參數(shù)資料
型號(hào): GS88136
廠商: GSI TECHNOLOGY
英文描述: 8Mb(256K x 36Bit)ByteSafe Synchronous Burst SRAM(8M位(256K x 36位)ByteSafe同步靜態(tài)RAM(帶2位脈沖地址計(jì)數(shù)器))
中文描述: 8MB的(256 × 36Bit)ByteSafe同步突發(fā)靜態(tài)存儲(chǔ)器(800萬(wàn)位(256K × 36位)ByteSafe同步靜態(tài)隨機(jī)存儲(chǔ)器(帶2位脈沖地址計(jì)數(shù)器))
文件頁(yè)數(shù): 33/33頁(yè)
文件大小: 463K
代理商: GS88136
Rev: 1.11 9/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com
33/33
2000, Giga Semconductor, Inc.
Preliminary
GS88118/36T-11/11.5/100/80/66
Revision History
DS/DateRev. Code: Old;
New
Types of Changes
Format or Content
Page;Revisions;Reason
GS88118/36T
Rev1.04h 5/
1999;
1.05 9/1999I
Format/Typos
Last Page/Fixed “GSGS..” in Ordering Information Note.
Fromatted Pin Outs and Pin Description to new small caps.
Formatted Block diagrams to new small caps.
Formatted Timing Diagrams to new small caps.
Changed “Flow thru” to “Flow Through” in Timing Diagrams.
Boundary Scan Register/Formatted to new small caps.
Package Diagram/Changed “Dimesion” to “Dimension”.
5/Fixed pin description table to match pinouts.
Pin Description/Changed chip enables to match pins.
Pin Description/Changed pin 80 from NC to Address Input.
Pin Description/Rearranged Address Inputs to match order of
Pinout
Package Diagram/Changed Dimension D Max from 20.1 to
22.1
Took out wrong Pinout on page 2 (256K x 32).
First Release of 880 F.
Content
GS88118/36T
1.05 9/
1999I;1.06 11/1999J
Content
GS88118/36T
1.06 11/
1999J;1.06 11/1999K
content
Changed Bump 3C to 4L on first page to correspond SCD pin
in BGA pinout.
GS88118/36T
1.06 11/
1999K
88118/36T
1.07 1/
2000L
Content
Changed order of TQFP Address Inputs to match pinout.
Changed order of TQFP DATA Input and Output pins to
match pinout.
New GSI Logo.
Changed all speed bin information (headings, references,
tables, ordering info..) to reflect 150 - 80Mhz
GS88118/36T1.07 1/2000M;
GS88118/36T1.08 3/2000N;
Content
GS88118/36T1.08 3/2000N;
GS88118/36T1.09 3/2000O;
Content
Corrections to AC Electrical Characteristics Table -
Fixed Boundary Scan Register Added Pin 29
8818 NGS88118/36T1.09 3/
2000O;
8811836_r1_10
Content/Format
Removed 150 MHz speed bin
Changed 133 MHz and 117 MHz speed bins to 11 ns and
11.5 ns (100 MHz) numbers
Updated format to comply with Technical Publications
standards
Updated Capitance table—removed Input row and changed
Output row to I/O
88118_r1_10; 88118_r1_11
Content
相關(guān)PDF資料
PDF描述
GS88118 8Mb(512K x 18Bit) ByteSafe Synchronous Burst SRAM(8M位(512K x 18位)ByteSafe同步靜態(tài)RAM(帶2位脈沖地址計(jì)數(shù)器))
GS881E18T 512K x 18, 256K x 36 ByteSafe 8Mb Sync Burst SRAMs
GS881E36T-100I 512K x 18, 256K x 36 ByteSafe 8Mb Sync Burst SRAMs
GS881E36T-11 512K x 18, 256K x 36 ByteSafe 8Mb Sync Burst SRAMs
GS881E36T-11.5 512K x 18, 256K x 36 ByteSafe 8Mb Sync Burst SRAMs
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