參數(shù)資料
型號: GS881E36BT-333
廠商: GSI TECHNOLOGY
元件分類: SRAM
英文描述: 512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs
中文描述: 256K X 36 CACHE SRAM, 4.5 ns, PQFP100
封裝: TQFP-100
文件頁數(shù): 7/39頁
文件大?。?/td> 815K
代理商: GS881E36BT-333
GS881E18B(T/D)/GS881E32B(T/D)/GS881E36B(T/D)
Rev: 1.04a 3/2009
15/39
2002, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Simplified State Diagram with G
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
WR
R
W
R
X
CR
R
CW
CR
W
CW
W
CW
Notes:
1. The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
2. Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from read cycles to write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal read cycles.
3. Transitions shown in gray tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
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