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參數(shù)資料
| 型號(hào)： | GTLPH16612DL |
| 元件分類： | 電平轉(zhuǎn)換器 |
| 英文描述： | 18-Bit Bus Transceiver |
| 中文描述： | 18位總線收發(fā)器 |
| 文件頁數(shù)： | 8/14頁 |
| 文件大?。?/td> | 112K |
| 代理商： | GTLPH16612DL |
Philips Semiconductors
Product data
GTLPH16612
18-bit GTLP to LVTTL/TTL bidirectional universal
translator (3-State)
2001 Sep 28
8
AC SETUP REQUIREMENTS (3.3 V
±
0.3 V RANGE)
A Port:
GND = 0 V; Input t
r
= t
f
= 2.5 ns; C
L
= 50 pF; R
L
= 500
; T
amb
= –40 to +85
°
C; V
REF
= 0.8 V or 1.0 V.
B Port:
GND = 0 V; Input t
r
= t
f
= 2.5 ns; C
L
= 30 pF; R
L
= 25
; V
REF
= 0.8 V or 1.0 V.
LIMITS
SYMBOL
DESCRIPTION
PARAMETER
WAVEFORM
V
CC
= 3.3 V
±
0.3 V
TYP
UNIT
MIN
MAX
t
w
(H)
t
w
(H or L)
t
s
(H or L)
t
s
(H)
t
s
(L)
t
s
(H or L)
t
s
(H or L)
t
s
(L)
t
s
(L)
t
h
(H or L)
t
h
(H or L)
t
h
(H or L)
t
h
(H or L)
t
h
(H)
t
h
(H)
Pulse duration
LEAB or LEBA
3
1.0
—
—
ns
Pulse duration
CPAB or CPBA
4
2.5
—
—
ns
Setup time
An before CPAB rising edge
4
2.0
—
—
ns
Setup time
Bn before CPBA rising edge
4
2.5
—
—
ns
Setup time
Bn before CPBA rising edge
4
3.1
—
—
ns
Setup time
An before LEAB falling edge
4
0.5
—
—
ns
Setup time
Bn before LEBA falling edge
4
2.5
—
—
ns
Setup time
CEAB before CPAB rising edge
4
0
—
—
ns
Setup time
CEBA before CPBA rising edge
4
0
—
—
ns
Hold time
An after CPAB rising edge
4
0
—
—
ns
Hold time
Bn after CPBA rising edge
4
0
—
—
ns
Hold time
An after LEAB falling edge
4
0.5
—
—
ns
Hold time
Bn after LEBA falling edge
4
0
—
—
ns
Hold time
CEAB after CPAB rising edge
4
1.1
—
—
ns
Hold time
CEBA after CPBA rising edge
4
1.1
—
—
ns
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