Rev. 3.00, 05/03, page xiv of xxx
13.3.11 Timer Status Register (TSR)................................................................................186
13.3.12 Timer Interrupt Enable Register (TIER)..............................................................188
13.3.13 PWM Mode Output Level Control Register (POCR)..........................................189
13.3.14 Interface with CPU ..............................................................................................189
Operation ..........................................................................................................................191
13.4.1 Counter Operation................................................................................................191
13.4.2 Waveform Output by Compare Match.................................................................194
13.4.3 Input Capture Function........................................................................................197
13.4.4 Synchronous Operation........................................................................................199
13.4.5 PWM Mode .........................................................................................................200
13.4.6 Reset Synchronous PWM Mode..........................................................................206
13.4.7 Complementary PWM Mode...............................................................................210
13.4.8 Buffer Operation..................................................................................................216
13.4.9 Timer Z Output Timing .......................................................................................223
Interrupts...........................................................................................................................226
13.5.1 Status Flag Set Timing.........................................................................................226
13.5.2 Status Flag Clearing Timing................................................................................228
Usage Notes......................................................................................................................228
13.4
13.5
13.6
Section 14 Watchdog Timer..............................................................................235
14.1
Features.............................................................................................................................235
14.2
Register Descriptions........................................................................................................235
14.2.1 Timer Control/Status Register WD (TCSRWD)..................................................236
14.2.2 Timer Counter WD (TCWD)...............................................................................237
14.2.3 Timer Mode Register WD (TMWD)...................................................................237
14.3
Operation ..........................................................................................................................238
Section 15 14-Bit PWM ....................................................................................239
15.1
Features.............................................................................................................................239
15.2
Input/Output Pin................................................................................................................240
15.3
Register Descriptions........................................................................................................240
15.3.1 PWM Control Register (PWCR)..........................................................................240
15.3.2 PWM Data Registers U and L (PWDRU, PWDRL)............................................241
15.4
Operation ..........................................................................................................................241
Section 16 Serial Communication Interface 3 (SCI3).......................................243
16.1
Features.............................................................................................................................243
16.2
Input/Output Pins..............................................................................................................246
16.3
Register Descriptions........................................................................................................246
16.3.1 Receive Shift Register (RSR) ..............................................................................247
16.3.2 Receive Data Register (RDR)..............................................................................247
16.3.3 Transmit Shift Register TSR (SCI3)....................................................................247
16.3.4 Transmit Data Register (TDR).............................................................................247