DESIGN INFORMATION
(Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
8-26
HA2556
Overshoot
+OS, -OS
V
Y
= 200mV step, V
X
= 5V
+25
o
C
17
%
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
17
%
Slew Rate
+SR, -SR
V
Y
= 10V step, V
X
= 5V
450
V/
μ
s
V/
μ
s
M
450
Differential Input Resistance
R
IN
(V
Y
)
V
Y
=
±
5V, V
X
= 0V
1
V
X
CHARACTERISTICS
Bandwidth
BW (V
X
)
GF (V
X
)
V
ISO
(1MHz)
V
ISO
(5MHz)
T
R
, T
F
-3dB, V
Y
= 5V, V
X
≤
200mV
P-P
0.1dB, V
Y
= 5V, V
X
≤
200mV
P-P
f
O
= 1MHz, V
X
= 200mV
P-P
,V
Y
= nulled (Note 2)
f
O
= 5MHz, V
X
= 200mV
P-P
, V
Y
= nulled (Note 2)
V
X
= 200mV step, V
Y
= 5V, 10% to 90% pts
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
52
MHz
Gain Flatness
4.0
MHz
AC Feedthrough
-65
dB
-50
dB
Rise & Fall Time
8
ns
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
8
ns
Overshoot
+OS, -OS
V
X
= 200mV step, V
Y
= 5V
17
%
17
%
Slew Rate
+SR, -SR
V
X
= 10V step, V
Y
= 5V
450
V/
μ
s
V/
μ
s
M
450
Differential Input Resistance
R
IN
(V
X
)
V
X
=
±
5V, V
Y
= 0V
1
OUTPUT CHARACTERISTICS
Output Resistance
R
OUT
I
OUT
V
Y
=
±
5V, V
X
= 5V, R
L
= 1k
to 250
V
OUT
= 5V, R
L
= 250
+25
o
C
+25
o
C
0.7
Output Current
±
45
±
45
±
6.05
±
6.05
mA
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
mA
Output Voltage Swing
+V
OUT
R
L
= 250
V
V
NOTES:
1. V
Z
AC characteristics may be implied from V
Y
due to the use of V
Z
as feedback in the test circuit.
2. Offset voltage applied to minimize feedthrough signal.
TYPICAL PERFORMANCE CHARACTERISTICS
(Continued)
Device Tested at Supply Voltage =
±
15V, R
F
= 50
, R
L
= 1k
, C
L
= 20pF, Unless Otherwise Specified.
PARAMETERS
SYMBOL
CONDITIONS
TEMP
TYP
UNITS
Spec Number
511063-883
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
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and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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