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參數(shù)資料
| 型號(hào)： | HA3-5320-5 |
| 廠(chǎng)商： | Intersil |
| 文件頁(yè)數(shù)： | 6/10頁(yè) |
| 文件大小： | 0K |
| 描述： | IC AMP SAMPLE&HOLD PREC 14-DIP |
| 標(biāo)準(zhǔn)包裝： | 25 |
| 放大器類(lèi)型： | 采樣和保持 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 45 V/µs |
| 增益帶寬積： | 2MHz |
| 電流 - 輸入偏壓： | 100nA |
| 電壓 - 輸入偏移： | 500µV |
| 電流 - 電源： | 11mA |
| 電流 - 輸出 / 通道： | 10mA |
| 電壓 - 電源，單路/雙路(±)： | ±13.5 V ~ 20 V |
| 工作溫度： | 0°C ~ 75°C |
| 安裝類(lèi)型： | 通孔 |
| 封裝/外殼： | 14-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 14-PDIP |
| 包裝： | 管件 |
5
FN2857.9
April 25, 2013
Application Information
The HA-5320 has the uncommitted differential inputs of an
op amp, allowing the Sample and Hold function to be
combined with many conventional op amp circuits. See the
Intersil Application Note AN517 for a collection of circuit
ideas.
Layout
A printed circuit board with ground plane is recommended
for best performance. Bypass capacitors (0.01
μF to 0.1μF,
ceramic) should be provided from each power supply
terminal to the Supply Ground terminal on pin 13.
The ideal ground connections are pin 6 (SIG. Ground)
directly to the system Signal Ground, and pin 13 (Supply
Ground) directly to the system Supply Common.
Hold Capacitor
The HA-5320 includes a 100pF MOS hold capacitor,
sufficient for most high speed applications (the Electrical
Specifications section is based on this internal capacitor).
Additional capacitance may be added between pins 7 and
11. This external hold capacitance will reduce droop rate at
the expense of acquisition time, and provide other trade-offs
as shown in the Performance Curves.
If an external hold capacitor CEXT is used, then a noise
bandwidth capacitor of value 0.1CEXT should be connected
from pin 8 to ground. Exact value and type are not critical.
The hold capacitor CEXT should have high insulation
resistance and low dielectric absorption, to minimize droop
errors. Polystyrene dielectric is a good choice for operating
temperatures up to +85°C. Teflon and glass dielectrics
offer good performance to +125°C and above.
Test Circuits and Waveforms
FIGURE 1. CHARGE TRANSFER AND DRIFT CURRENT
FIGURE 2. CHARGE TRANSFER TEST
FIGURE 3. DRIFT CURRENT TEST
FIGURE 4. HOLD MODE FEEDTHROUGH ATTENUATION
14
2
1
7
8
11
NC
-INPUT
+INPUT
S/H CONTROL
CONTROL
INPUT
S/H
OUTPUT
VO
(CH = 100pF)
HA-5320
S/H CONTROL
VO
VP
HOLD (+3.5V)
SAMPLE (0V)
NOTES:
13. Observe the “hold step” voltage VP.
14. Compute charge transfer: Q = VPCH.
S/H CONTROL
VO
ΔVO
Δt
NOTES:
15. Observe the voltage “droop”,
ΔV
O/Δt.
16. Measure the slope of the output during hold,
ΔVO/Δt, and
compute drift current: ID = CH ΔVO/Δt.
HOLD (+3.5V)
SAMPLE (0V)
VIN
ANALOG
MUX OR
SWITCH
AIN
S/H CONTROL
+IN
-IN
OUT
VOUT
7
1
2
14
V-
V+
S/H CONTROL
INPUT
95
100kHz
SINE WAVE
10VP-P
CEXT
TO
SIGNAL
GND
TO
SUPPLY
COMMON
NC
13
11
6
NC
8
INT.
COMP.
REF
COM
SUPPLY
GND
HA-5320
NOTE:
Feedthrough in
where:
VOUT = VP-P, Hold Mode, VIN = VP-P.
dB
20
V
OUT
V
IN
---------------
log
=
HA-5320
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