參數(shù)資料
型號: HA5022
廠商: Intersil Corporation
英文描述: Dual, 125MHz, Video Current Feedback Amplifier with Disable
中文描述: 雙通道,125MHz的,視頻電流反饋放大器禁用
文件頁數(shù): 8/16頁
文件大小: 169K
代理商: HA5022
8
disabled the amplifier output assumes a true high
impedance state and the supply current is reduced
significantly.
The circuit shown in Figure 8 is a simplified schematic of the
enable/disable function. The large value resistors in series
with the DISABLE pin makes it appear as a current source to
the driver. When the driver pulls this pin low current flows out
of the pin and into the driver. This current, which may be as
large as 350
μ
A when external circuit and process variables
are at their extremes, is required to insure that point “A”
achieves the proper potential to disable the output. The
driver must have the compliance and capability of sinking all
of this current.
When V
CC
is +5V the DISABLE pin may be driven with a
dedicated TTL gate. The maximum low level output voltage
of the TTL gate, 0.4V, has enough compliance to insure that
the amplifier will always be disabled even though D
1
will not
turn on, and the TTL gate will sink enough current to keep
point “A” at its proper voltage. When V
CC
is greater than +5V
the DISABLE pin should be driven with an open collector
device that has a breakdown rating greater than V
CC
.
Referring to Figure 8, it can be seen that R
6
will act as a pull-
up resistor to +V
CC
if the DISABLE pin is left open. In those
cases where the enable/disable function is not required on
all circuits some circuits can be permanently enabled by
letting the DISABLE pin float. If a driver is used to set the
enable/disable level, be sure that the driver does not sink
more than 20
μ
A when the DISABLE pin is at a high level.
TTL gates, especially CMOS versions, do not violate this
criteria so it is permissible to control the enable/disable
function with TTL.
Typical Applications
Two Channel Video Multiplexer
Referring to the amplifier U
1A
in Figure 9, R
1
terminates the
cable in its characteristic impedance of 75
, and R
4
back
terminates the cable in its characteristic impedance. The
amplifier is set up in a gain configuration of +2 to yield an
overall network gain of +1 when driving a double terminated
cable. The value of R
3
can be changed if a different network
gain is desired. R
5
holds the disable pin at ground thus
inhibiting the amplifier until the switch, S
1
, is thrown to
position 1. At position 1 the switch pulls the disable pin up to
the plus supply rail thereby enabling the amplifier. Since all
of the actual signal switching takes place within the amplifier,
it’s differential gain and phase parameters, which are 0.03%
and 0.03 degrees respectively, determine the circuit’s
performance. The other circuit, U
1B
, operates in a similar
manner.
When the plus supply rail is 5V the disable pin can be driven
by a dedicated TTL gate as discussed earlier. If a multiplexer
IC or its equivalent is used to select channels its logic must
be break before make. When these conditions are satisfied
the HA5022 is often used as a remote video multiplexer, and
the multiplexer may be extended by adding more amplifier
ICs.
Low Impedance Multiplexer
Two common problems surface when you try to multiplex
multiple high speed signals into a low impedance source
such as an A/D converter. The first problem is the low source
impedance which tends to make amplifiers oscillate and
causes gain errors. The second problem is the multiplexer
which supplies no gain, introduces all kinds of distortion and
limits the frequency response. Using op amps which have an
enable/disable function, such as the HA5022, eliminates the
multiplexer problems because the external mux chip is not
needed, and the HA5022 can drive low impedance (large
capacitance) loads if a series isolation resistor is used.
Referring to Figure 10, both inputs are terminated in their
characteristic impedance; 75
is typical for video
applications. Since the drivers usually are terminated in their
characteristic impedance the input gain is 0.5, thus the
amplifiers, U
2
, are configured in a gain of +2 to set the circuit
gain equal to one. Resistors R
2
and R
3
determine the
amplifier gain, and if a different gain is desired R
2
should be
changed according to the equation G = (1 + R
3
/R
2
). R
3
sets
the frequency response of the amplifier so you should refer
to the manufacturers data sheet before changing its value.
R
5
, C
1
and D
1
are an asymmetrical charge/discharge time
circuit which configures U
1
as a break before make switch to
prevent both amplifiers from being active simultaneously. If
this design is extended to more channels the drive logic
must be designed to be break before make. R
4
is enclosed
in the feedback loop of the amplifier so that the large open
loop amplifier gain of U
2
will present the load with a small
closed loop output impedance while keeping the amplifier
stable for all values of load capacitance.
The circuit shown in Figure 10 was tested for the full range of
capacitor values with no oscillations being observed; thus,
problem one has been solved.The frequency and gain
characteristics of the circuit are now those of the amplifier
independent of any multiplexing action; thus, problem two
has been solved. The multiplexer transition time is
approximately 15
μ
s with the component values shown.
R
6
15K
R
7
15K
V+
ENABLE/DISABLE INPUT
D
1
Q
P3
R
8
Q
P18
A
R
33
R
10
FIGURE 8. SIMPLIFIED SCHEMATIC OF ENABLE/DISABLE
FUNCTION
HA5022
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