Absolute Maximum Ratings (Note 3) Thermal Information Voltage Between V+ and V" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� HA9P5020-5X96
寤犲晢锛� Intersil
鏂囦欢闋佹暩(sh霉)锛� 17/23闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC OPAMP CFA 110MHZ 8-SOIC
妯欐簴鍖呰锛� 2,500
鎳�(y墨ng)鐢細 闆绘祦鍙嶉
闆昏矾鏁�(sh霉)锛� 1
-3db甯跺锛� 100MHz
杞�(zhu菐n)鎻涢€熺巼锛� 1100 V/µs
闆绘祦 - 闆绘簮锛� 7.5mA
闆绘祦 - 杓稿嚭 / 閫氶亾锛� 31.7mA
闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� ±4.5 V ~ 18 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 8-SOIC锛�0.154"锛�3.90mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 8-SOIC
鍖呰锛� 甯跺嵎 (TR)
3
FN2845.12
May 21, 2013
Absolute Maximum Ratings (Note 3)
Thermal Information
Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . 36V
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 卤VSUPPLY
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V
Output Current . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protected
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . . 0掳C to +75掳C
Thermal Resistance (Typical, Note 4)
JA (掳C/W) 胃JC (掳C/W)
PDIP Package* . . . . . . . . . . . . . . . . . .
120
N/A
SOIC Package . . . . . . . . . . . . . . . . . . .
165
N/A
Maximum Junction Temperature (Plastic Packages, Note 3) . . +150掳C
Maximum Storage Temperature Range . . . . . . . . -65掳C to +150掳C
*Pb-free PDIPs can be used for through hole wave solder process-
ing only. They are not intended for use in Reflow solder processing
applications
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
CAUTION: Stresses above those listed in 鈥淎bsolute Maximum Ratings鈥� may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3. Maximum power dissipation, including output load, must be designed to maintain junction temperature below +150掳C for plastic packages.
4.
JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
VSUPPLY = 卤15V, RF = 1k惟, AV = +1, RL = 400惟, CL 鈮� 10pF,
Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
TEMP.
(掳C)
MIN
TYP
MAX
UNITS
INPUT CHARACTERISTICS
Input Offset Voltage (Notes 6, 17)
25
-
2
8
mV
Full
-
10
mV
Average Input Offset Voltage Drift
Full
-
10
-
V/掳C
VIO Common Mode Rejection Ratio (Note 17)
VCM = 卤10V
25
60
-
dB
Full
50
-
dB
VIO Power Supply Rejection Ratio (Note 17)
卤4.5V
鈮� VS 鈮� 卤18V
25
64
-
dB
Full
60
-
dB
Non-Inverting Input (+IN) Current (Note 17 )25
-
3
8
A
Full
-
20
A
+IN Common Mode Rejection
VCM = 卤10V
25
-
0.1
A/V
Full
-
0.5
A/V
+IN Power Supply Rejection
卤4.5V
鈮� VS 鈮� 卤18V
25
-
0.06
A/V
Full
-
0.2
A/V
Inverting Input (-IN) Current (Note 17)
25
-
12
20
A
Full
-
25
50
A
-IN Common Mode Rejection
VCM = 卤10V
25
-
0.4
A/V
Full
-
0.5
A/V
-IN Power Supply Rejection
卤4.5V
鈮� VS 鈮� 卤18V
25
-
0.2
A/V
Full
-
0.5
A/V
TRANSFER CHARACTERISTICS
Transimpedance (Notes 12, 17)
25
3500
-
V/mA
Full
1000
-
V/mA
Open Loop DC Voltage Gain (Note 12)
RL = 400惟,
VOUT = 卤10V
25
70
-
dB
Full
65
-
dB
Open Loop DC Voltage Gain
RL = 100惟,
VOUT = 卤2.5V
25
60
-
dB
Full
55
-
dB
HA-5020
鐩搁棞(gu膩n)PDF璩囨枡
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鍙冩暩(sh霉)鎻忚堪
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