參數(shù)資料
型號(hào)： HC-5502X
廠商： Intersil Corporation
英文描述： ()
中文描述： （）
文件頁(yè)數(shù)： 11/17頁(yè)
文件大?。?/td> 255K
代理商： HC-5502X
4-11
Power Denial (PD)
Power denial limits power to the subscriber loop: it does not
power down the SLIC, i.e., the SLIC will still consume its
normal on-hook quiescent power during a power denial
period. This function is intended to “isolate” from the battery,
under processor control, selected subscriber loops during an
overload or similar fault status.
If PD is selected, the logic circuitry inhabits RC and switches
in a current source to C3. The capacitor charges up to a
nominal -3.5V at which point it is clamped. Since TF is
always biases at -4V, the battery feed across the loop is
essentially zero, and minimum loop power will be dissipated
if the circuit goes off-hook. No signalling functions are
available during this mode.
After power denial is released (PD = 1), it will be several
hundred milliseconds (300ms) before the R
F
output reaches
its nominal battery setting. This is due to the RC time
constant of R21 and C3.
Transhybrid Loss and Longitudinal
Balance
During 4W to 2W transmission, the 4W signal is returned to
the transmit output: this is called transhybrid return: it is not a
reflection from the line as it will only occur if the loop is closed.
In order to prevent echo and instability in the switch, this
returned signal must be balanced out before it reaches the
filter/CODEC. The level of the returned signal is given below,
and a balancing network utilizing the on-chip spare op amp is
indicated in Figure 14. Since the returned received signal’s
amplitude and phase are a function of the line’s AC
impedance, the balance network is a function of the same.
For a resistive line, the two arms of the balance network
(Figure 14) are also resistive. In the simplest case, for a
600
system, the two parts of the summing network have
equi-resistance values. For a transhybrid balance greater
than 36dB, component tolerances of
±
0.5% are
recommended. Both arms of the summing network are
capacitively coupled since the TA and TF amplifiers have
output and input DC biases, respectively. The values of the
capacitors are chosen to prevent degradation of the audio
frequency response. For capacitive values of 0.5
μ
F,
components with tolerances of 10% can be used since at
voice band frequencies the reactance of the capacitor has
minimal effect on the impedance of the balance network.
The transhybrid returned signal is given by:
where R = (R
B1
+ R
B2
) = (R
B3
+ R
B4
), and Z
L
= Line
Impedance.
For the balance network, the general equation is given by:
Z
B
= 2R + Z
L
with R1 = 4R in Figure 14.
A full derivation of the balance equation is given in Appendix 1.
A measure off this balance is known as transhybrid loss. For a
600
resistive line, a balance of 40dB at 1kHz is attainable. In
practice owing to variations in lines and telephone sets the
balance is usually lower than in the ideal case: A balance in the
order of 25dB will often be measured and accepted.
By switching out the balance network, it is possible for the
controller to conduct loop back tests providing the loop can
be closed via a test relay in the line card.
Longitudinal balance is equivalent to common mode rejection
ratio. Looking into the line card tip and ring terminals towards
the SLIC, the 2W balance is a function of the impedance
match between tip and ring to ground. The 4W balance is a
function of the 2W balance, and the matching of the feedback
resistor ratios around the transversal amplifier. (The TA itself
must also exhibit a CMRR in excess of the required
longitudinal balance.) The SLIC user can only control the
matching of the feed resistors. For a nominal 60dB of
rejection, these must match within 0.1%. The on-chip resistors
are thin film SiCr resistors and are matched within 0.1%. The
amplifier has a CMRR of 70dB giving a typical 4W balance of
60dB.
FIGURE 13. RING TIP SEQUENCE
V
TX
V
RX
–
=
)
Z
L
)
------------+
Application Note 549
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