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參數(shù)資料
| 型號(hào)： | HC3-5560-5 |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | PCM Transcoder |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PDIP20 |
| 文件頁(yè)數(shù)： | 8/9頁(yè) |
| 文件大小： | 67K |
| 代理商： | HC3-5560-5 |
76
FIGURE 5.
Zeros which occur during a high to low transition of Reset AIS are counted with the zeros that occurred before the high to low transi-
tion.
FIGURE 6. ENCODE TIMING AND DELAY
Data is clocked on the negative edge of CLK ENC and appears on OUT1 and OUT2. OUT1 and OUT2 are interchangeable. Bipo-
lar violations and all other pulses inserted by the line coding scheme to encode strings of zeros are labeled with an “S”.
Timing Waveforms
(Continued)
CLK DEC
RESET AIS
NRZ DATA OUT
AIS
S
S
S
S
S
S
S
S
S
S
S
S
NRZ DATA IN
CLK ENC
OUT 1
OUT 2
OUT 1
OUT 2
OUT 1
OUT 2
OUT 1
OUT 2
AMI
HDB3
B6ZS
B8ZS
3 1/2 CYCLES
5 1/2 CYCLES
HC-5560
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相關(guān)代理商/技術(shù)參數(shù) |
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| HC3-5560B3859 | 制造商:Harris Corporation 功能描述: |
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