參數(shù)資料
型號: HC55130IM
廠商: INTERSIL CORP
元件分類: 模擬傳輸電路
英文描述: IC-VLTG REG +9V TO220 ISO
中文描述: TELECOM-SLIC, PQCC28
封裝: PLASTIC, MS-018AB, LCC-28
文件頁數(shù): 1/35頁
文件大小: 382K
代理商: HC55130IM
4-1
TM
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
Intersil and Design is a trademark of Intersil Corporation.
Copyright
Intersil Corporation 2000
File Number
4659.5
HC55120, HC55121, HC55130, HC55131, HC55140,
HC55141, HC55142, HC55143, HC55150, HC55151
Low Power Universal SLIC Family
The UniSLIC14 is a family of Ultra Low Power SLICs. The
feature set and common pinouts of the UniSLIC14 family
positions it as a universal solution for: Plain Old Telephone
Service (POTS), PBX, Central Office, Loop Carrier, Fiber in the
Loop, ISDN-TA and NT1+, Pairgain and Wireless Local Loop.
The UniSLIC14 family achieves its ultra low power operation
through: Its automatic single and dual battery selection
(based on line length) and battery tracking anti clipping to
ensure the maximum loop coverage on the lowest battery
voltage. This architecture is ideal for power critical
applications such as ISDN NT1+, Pairgain and Wireless
local loop products.
The UniSLIC14 family has many user programmable
features. This family of SLICs delivers a low noise, low
component count solution for Central Office and Loop
Carrier universal voice grade designs. The product family
integrates advanced pulse metering, test and signaling
capabilities, and zero crossing ring control.
The UniSLIC14 family is designed in the Intersil “Latch” free
Bonded Wafer process. This process dielectrically isolates
the active circuitry to eliminate any leakage paths as found in
our competition’s JI process. This makes the UniSLIC14
family compliant with “hot plug” requirements and operation
in harsh outdoor environments.
Block Diagram
Features
Ultra Low Active Power (OHT) < 60mW
Single/Dual Battery Operation
Automatic Silent Battery Selection
Power Management/Shutdown
Battery Tracking Anti Clipping
Single 5V Supply with 3V Compatible Logic
Zero Crossing Ring Control
- Zero Voltage On/Zero Current Off
Tip/Ring Disconnect
Pulse Metering Capability
4 Wire Loopback
Programmable Current Feed
Programmable Resistive Feed
Programmable Loop Detect Threshold
Programmable On-Hook and Off-Hook Overheads
Programmable Overhead for Pulse Metering
Programmable Polarity Reversal Time
Selectable Transmit Gain 0dB/-6dB
2 Wire Impedance Set by Single Network
Loop and Ground Key Detectors
On-Hook Transmission
Common Pinout
HC55121
- Polarity Reversal
HC55130
- -63dB Longitudinal Balance
HC55140
- Polarity Reversal
- Ground Start
- Line Voltage Measurement
- 2 Wire Loopback
- -63dB Longitudinal Balance
HC55142
- Polarity Reversal
- Ground Start
- Line Voltage Measurement
- 2.2V
RMS
Pulse Metering
- 2 Wire Loopback
HC55150
- Polarity Reversal
- Line Voltage Measurement
- 2.2V
RMS
Pulse Metering
- 2 Wire Loopback
Applications
Related Literature
- AN9871, User’s Guide for UniSLIC14 Eval Board
RRLY
DT
DR
TIP
RING
V
BH
V
CC
RING AND TEST
RELAY DRIVERS
RING TRIP
DETECTOR
V
BL
BGND
AGND
BATTERY
SELECTION
AND
BIAS
NETWORK
ZERO CURRENT
CROSSING
2-WIRE
INTERFACE
TRLY1
TRLY2
V
TX
V
RX
PTG
C1
C2
C3
C4
C5
GKD_LVM
ROH
CDC
RDC_RAC
RD
ZT
C
H
LOOP CURRENT
DETECTOR
ILIM
RSYNC_REV
STATE
DECODER
AND
DETECTOR
LOGIC
GKD/LOOP LENGTH
DETECTOR
SHD
4-WIRE INTERFACE
VF SIGNAL PATH
LINE FEED
CONTROL
CRT_REV_LVM
POLARITY
REVERSAL
PULSE METERING
SIGNAL PATH
SPM
Data Sheet
June 2000
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