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參數(shù)資料
| 型號： | HC55141 |
| 廠商： | Intersil Corporation |
| 英文描述： | Low Power Universal SLIC Family |
| 中文描述： | 低功耗通用用戶接口家庭 |
| 文件頁數(shù)： | 23/35頁 |
| 文件大?。?/td> | 382K |
| 代理商： | HC55141 |
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4-23
2-Wire Loopback Test
Most of the SLICs in the UniSLIC14 family feature 2-Wire
loopback testing. This loopback function is only activated
when the subscriber is
on hook
and the logic command to
the SLIC is in the Test Active State. (Note: if the subscriber is
off hook
and in the Test Active State, the function performed
is the Line Voltage Measurement.)
During the 2-wire loopback test, a 2k
internal resistor is
switched across the tip and ring terminals of the SLIC. This
allows the SHD function and the 4-wire to 4-wire AC
transmission, right up to the subscriber loop, to be tested.
Together with the 4-wire loopback test in the Open Circuit
logic state, this 2-wire loopback test allows the complete
network (including SLIC) to be tested up to the subscriber
loop.
Pulse Metering
The HC55121, HC55142 and the HC55150 are designed to
support pulse metering. They offer solutions to the following
pulse metering design issues:
1) Providing adequate signal gain and current drive to the
subscriber metering equipment to overcome the attenuation
of this (12kHz, 16kHz) out of band signal.
2) Attenuating the pulse metering transhybrid signal without
severely attenuating the voice band signal to avoid clipping
in the CODEC/Filter.
3) Tailoring the overload levels in the SLIC to avoid clipping
of the combined voiceband and pulse metering signal.
4) Having the provision of silent polarity reversal as a backup
in the case where the loop attenuates the out of band signal
too much for it to be detected by the subscriber’s metering
equipment.
Adequate Signal Gain
Adequate signal gain and current drive to the subscriber’s
metering equipment is made easier by the network shown in
Figure 23. The pulse metering signal is supplied to a
dedicated high impedance input pin called SPM. The circuit
in Figure 23 shows the connection of a network that sets the
2-wire impedance (Z
TR
), at the pulse metering frequencies,
to be approximately 200
. If the line impedance (Z
L
) is equal
to 200
at the pulse metering frequencies, then the 4-Wire
to 2-wire gain (V
TR
/ SPM) is equal 4. Thereby lowering the
input signal requirements of the pulse metering signal.
Note: The automatic pulse metering 2-wire impedance
matching is independent of the programmed 2-wire
impedance matching at voiceband frequencies.
Calculation of the pulse metering gain is achieved by
replacing V
RX
/500k in Equation 15 with SPM/125k and
following the same process through to Equation 21. The
UniSLIC14 sets the 2-wire input impedance of the SLIC
(Z
TR
), including the protection resistors, equal to 200
. The
results are shown in Equation 40.
V
L
TR
Avoiding Clipping in the CODEC/Filter
The amplitude of the returning pulse metering signal is often
very large and could easily over drive the input to the
CODEC/Filter. By using the same method discussed in
section “Transhybrid Balance”, most if not all of the pulse
metering signal can be canceled out before it reaches the
input to the CODEC/Filter. This connection is shown in
Figure 23.
Overload Levels and Silent Polarity Reversal
The pulse metering signal and voice are simultaneously
transmitted, and therefore require additional overhead to
prevent distortion of the signal. Reference section “Off hook
Overhead Voltage” to account for the additional pulse
metering signal requirements.
Most of the SLICs in the UniSLIC14 family feature full
polarity reversal. Full polarity reversal means that the SLIC
can: transmit, determine the status of the line (on hook and
off hook) and provide “silent” polarity reversal. Reference
Equation 39 to program the polarity reversal time.
FIGURE 22. 4-WIRE AND 2-WIRE LOOPBACK TESTS
V
TX
V
RX
TIP
RING
4-WIRE LOOPBACK
UniSLIC14
600
DUAL SUPPLY
CODEC/FILTER
INTERNAL
2-WIRE LOOPBACK
+
-
PTG
A
4-2
=
-------------
= 8
–
Z
-------------------------
8
---------------------------
–
4
–
=
=
(EQ. 40)
FIGURE 23. PULSE METERING WITH TRANSHYBRID
BALANCE
V
TX
V
RX
= 0
500K
500K
500K
PTG
R1
+
-
I
X
A = 1
I
X
R2
500K
UniSLIC14
Z
T
1/80K
5
125K
SPM
12/16kHz
PULSE METERING
INPUT SIGNAL
SETS 2-WIRE
IMPEDANCE
AT 12-16kHz
EQUAL TO
200
HC55120, HC55121, HC55130, HC55131, HC55140, HC55141, HC55142, HC55143, HC55150, HC55151
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HC55141IM | Low Power Universal SLIC Family |
| HC55142 | Low Power Universal SLIC Family |
| HC55142IM | Low Power Universal SLIC Family |
| HC55143 | Low Power Universal SLIC Family |
| HC55143IM | Low Power Universal SLIC Family |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HC55141IM | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power Universal SLIC Family |
| HC55142 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power Universal SLIC Family |
| HC55142IB | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power Universal SLIC Family |
| HC55142IBZ | 功能描述:電信線路管理 IC LW PWR SLIC POLV/MTRING 63DB RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| HC55142IM | 制造商:Rochester Electronics LLC 功能描述:LOW PWR SLIC,POL REV/METERING,53DB BALANCE - Bulk |
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