參數(shù)資料
型號： HC9P5504B-9
廠商： HARRIS SEMICONDUCTOR
元件分類： 模擬傳輸電路
英文描述： EIA/ITU PABX SLIC with 40mA Loop Feed
中文描述： TELECOM-SLIC, PDSO24
文件頁數(shù)： 3/9頁
文件大?。?/td> 87K
代理商： HC9P5504B-9
53
Ground Key Detection Threshold
GKD = V
OL
20
-
-
mA
GKD = V
OH
-
-
10
mA
Loop Current During Power Denial
R
L
= 200
-
±
2
-
mA
Dial Pulse Distortion
0
-
5
ms
Receive Input Impedance
(Note 3)
-
110
-
k
Transmit Output Impedance
(Note 3)
-
10
20
2-Wire Return Loss
SR
L
LO
Referenced to 600
+ 2.16
μ
F (Note 3)
-
15.5
-
dB
ER
L
-
24
-
dB
SR
L
HI
-
31
-
dB
Longitudinal Balance
2-Wire Off Hook
1V
RMS
200Hz - 3400Hz (Note 3) IEEE Method
0
o
C
≤
T
A
≤
75
o
C
58
65
-
dB
2-Wire On Hook
60
63
-
dB
4-Wire Off Hook
50
58
-
dB
Low Frequency Longitudinal Balance
R.E.A. Method (Note 3), R
L
= 600
0
o
C
≤
T
A
≤
75
o
C
-
-
23
dBrnC
-
-
-67
dBm0p
Insertion Loss
at 1kHz, 0dBm Input Level, Referenced 600
2-Wire to 4-Wire, 4 Wire to 2-Wire
-
±
0.05
±
0.2
dB
Frequency Response
200Hz - 3400Hz Referenced to Absolute Loss at
1kHz and 0dBm Signal Level (Note 3)
-
±
0.02
±
0.05
dB
Idle Channel Noise
(Note 3)
2-Wire to 4-Wire, 4 Wire to 2-Wire
-
1
5
dBrnC
-
-89
-85
dBm0p
Absolute Delay
(Note 3)
2-Wire to 4-Wire, 4 Wire to 2-Wire
-
-
2
ms
Trans Hybrid Loss
Balance Network Set Up for 600
Termination at
1kHz
36
40
-
dB
Overload Level
V
B
+ = +5V
1.5
-
-
V
PEAK
2-Wire to 4-Wire, 4 Wire to 2-Wire
V
B
+ = 12V
1.75
-
-
V
PEAK
Level Linearity
At 1kHz Referenced to 0dBm Level (Note 3)
+3 to -40dBm
2-Wire to 4-Wire, 4 Wire to 2-Wire
-
-
±
0.05
dB
-40 to -50dBm
-
-
±
0.1
dB
-50 to -55dBm
-
-
±
0.3
dB
Power Supply Rejection Ratio
V
B
+ to 2-Wire
(Note 3)
30 - 60Hz, R
L
= 600
15
-
-
dB
V
B
+ to Transmit
15
-
-
dB
V
B
- to 2-Wire
15
-
-
dB
V
B
- to Transmit
15
-
-
dB
Electrical Specifications
Unless Otherwise Specified, V
B
- = -48V, V
B
+ = 12V and 5V, AG = BG = DG = 0V, Typical Parameters
T
A
= 25
o
C. Min-Max Parameters are Over Operating Temperature Range
(Continued)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
HC-5504B
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