參數資料
型號: HCMS-2714
英文描述: CMOS 5 x 7 Small Alphanumeric Displays(CMOS 5 x 7 小文字數字顯示器)
中文描述: 5 × 7的CMOS字母數字顯示小的CMOS(5 × 7小文字數字顯示器)
文件頁數: 8/10頁
文件大小: 223K
代理商: HCMS-2714
8
Electrical Description
Each display device contains four
or eight 5x7 LED dot matrix
characters and two or four CMOS
integrated circuits, as shown in
Figure 5. The CMOS integrated
circuits form an on-board 28 bit
or 56 bit serial-in-parallel-out
shift register that will accept
standard TTL logic levels. The
Data Input pin is connected to bit
position 1 and the Data Output
pin is connected to bit position
28 (56). The shift register
outputs control constant current
sinking LED row drivers. The
nominal current sink per LED
driver is 11 mA. A logic 1 stored
in the shift register enables the
corresponding LED row driver
and a logic 0 stored in the shift
register disables the correspond-
ing LED row driver.
The electrical configuration of
these CMOS IC alphanumeric
displays allows for an effective
interface to a display controller
circuit that supplies decoded
character information. The row
data for a given column (one 7
bit byte per character) is loaded
(bit serial) into the on-board 28
(56) bit shift register with high to
low transitions of the Clock input.
To load decoded character infor-
mation into the display, column
data for character 4 (8) is loaded
first and the column data for
character 1 is loaded last in the
following manner. The 7 data bits
for column 1, character 4 (8), are
loaded into the on-board shift
register. Next, the 7 data bits for
column 1, character 3 (7), are
loaded into the shift register,
shifting the character 4 (8) data
bits over one character position.
This process is repeated for the
other 2 (6) characters until all 28
(56) bits of column data (four or
eight 7 bit bytes of character
column data) are loaded into the
on-board shift register. Then the
column 1 input, V
COL
, pin 1, is
energized to illuminate column 1
in all 4 (8) characters. This
process is repeated for columns
2, 3, 4, and 5. All of the V
COL
inputs should be at logic low to
insure the display is off when
loading data. The display will be
blanked when the blanking input
V
B
is at logic low regardless of
the outputs of the shift register or
whether one of the V
COL
inputs is
energized.
Refer to Application Note 1016
Using the HDSP-2000 Alphanu-
meric Display Family
for drive
circuit information.
Figure 5. Block Diagram of an HCMS-27XX Series LED Alphanumeric Display.
相關PDF資料
PDF描述
HCMS-2904 High Performance CMOS 5 x 7 Alphanumeric Displays(高性能CMOS 5 x 7 文字數字顯示器)
HCMS-2905 High Performance CMOS 5 x 7 Alphanumeric Displays(高性能CMOS 5 x 7 文字數字顯示器)
HCMS-2914 High Performance CMOS 5 x 7 Alphanumeric Displays(高性能CMOS 5 x 7 文字數字顯示器)
HCMS-2915 High Performance CMOS 5 x 7 Alphanumeric Displays(高性能CMOS 5 x 7 文字數字顯示器)
HCMS-2921 High Performance CMOS 5 x 7 Alphanumeric Displays(高性能CMOS 5 x 7 文字數字顯示器)
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