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參數(shù)資料
| 型號(hào)： | HCPL-193K200 |
| 英文描述： | LOGIC-GATE-OUTPUT OPTOCOUPLER |
| 中文描述： | 邏輯門(mén)輸出光耦合器 |
| 文件頁(yè)數(shù)： | 5/12頁(yè) |
| 文件大?。?/td> | 264K |
| 代理商： | HCPL-193K200 |
2
without adversely affecting the
parametric performance.
These dual channel optocouplers
are available in an 8-Pin DIP and
in an industry standard SO-8
package. The following is a cross
reference table listing the 8-Pin
DIP part number and the
electrically equivalent SOIC-8 part
number.
8-Pin DIP
SO-8
HCPL-2730 HCPL-0730
HCPL-2731 HCPL-0731
The SO-8 does not require
“through holes” in a PCB. This
package occupies approximately
one-third the footprint area of the
standard dual-in-line package.
The lead profile is designed to be
compatible with standard surface
mount processes.
Guaranteed operation at low input
currents and the high current
transfer ratio (CTR) reduce the
magnitude and effects of CTR
degradation.
The outstanding high temperature
performance of this split
Darlington type output amplifier
results from the inclusion of an
integrated emitter-base bypass
resistor which shunts photodiode
and first stage leakage currents to
ground.
The HCPL-2731/0731 have a
400% minimum CTR at an input
current of only 0.5 mA making it
ideal for use in low input current
applications such as MOS, CMOS,
and low power logic interfacing or
RS232C data transmission
systems. In addition, the high
CTR and high output current
capability make this device
extremely useful in applications
where a high fanout is required.
Compatibility with high voltage
CMOS logic systems is guaranteed
by the 18 V VCC and VO specifica-
tions and by testing output high
leakage (IOH) at 18 V.
The HCPL-2730/0730 are speci-
fied at an input current of 1.6 mA
and have a 7 V VCC and VO rating.
The 300% minimum CTR allows
TTL to TTL interfacing at this
input current.
Important specifications such as
CTR, leakage current, and output
saturation voltage are guaranteed
over the 0
°C to 70°C temperature
range to allow trouble-free system
operation. Selection for lower
input currents down to 250
A is
available upon request.
Selection Guide
Widebody
8-Pin DIP
Package
Hermetic
(300 Mil)
Small Outline SO-8
(400 mil)
Single and
Dual
Single
Dual
Minimum
Absolute
Dual
Single
Channel
Single
Input ON
Maxi-
Channel
Package
Channel
Current
Minimum
mum
Packages
Package
HCPL-
Package
(IF)
CTR
VCC
HCPL-
6N139[1]
2731
0701[1]
0731
HCNW139[1]
0.5 mA
400%
18 V
6N138[1]
2730
0700[1]
0730
HCNW138[1]
1.6 mA
300%
7 V
HCPL-4701[1]
4731[1]
070A[1]
073A[1]
40
A
800%
18 V
0.5 mA
300%
20 V
5701[1]
5700[1]
5731[1]
5730[1]
Note:
1. Technical data are on separate Agilent publications.
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| HCPL-193K300 | LOGIC-GATE-OUTPUT OPTOCOUPLER |
| HCPL-193K600 | LOGIC-GATE-OUTPUT OPTOCOUPLER |
| HCPL2200 | LOGIC-GATE-OUTPUT OPTOCOUPLER |
| HCPL-2200 | LOGIC-GATE-OUTPUT OPTOCOUPLER |
| HCPL-2219 | LOGIC-GATE-OUTPUT OPTOCOUPLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HCPL-193K-200 | 制造商:AGILENT 制造商全稱(chēng):AGILENT 功能描述:Dual Channel Line Receiver Dual Channel Line Receiver Dual Channel Line Receiver |
| HCPL-193K300 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:LOGIC-GATE-OUTPUT OPTOCOUPLER |
| HCPL-193K-300 | 制造商:AGILENT 制造商全稱(chēng):AGILENT 功能描述:Dual Channel Line Receiver Dual Channel Line Receiver Dual Channel Line Receiver |
| HCPL-193K600 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:LOGIC-GATE-OUTPUT OPTOCOUPLER |
| HCPL-193K-600 | 制造商:AGILENT 制造商全稱(chēng):AGILENT 功能描述:Dual Channel Line Receiver Dual Channel Line Receiver Dual Channel Line Receiver |
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