參數(shù)資料
型號: HCS273KMSR
廠商: HARRIS SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Radiation Hardened Octal D Flip-Flop
中文描述: HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDFP20
文件頁數(shù): 4/9頁
文件大?。?/td> 139K
代理商: HCS273KMSR
339
Specifications HCS273MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
(NOTES 1, 2)
CONDITIONS
GROUP
A SUB-
GROUPS
TEMPERATURE
LIMITS
UNITS
MIN
MAX
CP to Q
TPLH
VCC = 4.5V
9
+25
o
C
2
19
ns
10, 11
+125
o
C, -55
o
C
2
22
ns
TPHL
VCC = 4.5V
9
+25
o
C
2
23
ns
10, 11
+125
o
C, -55
o
C
2
27
ns
MR to Q
TPHL
VCC = 4.5V
9
+25
o
C
2
25
ns
10, 11
+125
o
C, -55
o
C
2
29
ns
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500
, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
LIMITS
UNITS
MIN
MAX
Capacitance Power
Dissipation
CPD
VCC = 5.0V, f = 1MHz
1
+25
o
C
-
60
pF
1
+125
o
C, -55
o
C
-
70
pF
Input Capacitance
CIN
VCC = 5.0V, f = 1MHz
1
+25
o
C
-
10
pF
1
+125
o
C, -55
o
C
-
10
pF
Output Transition
Time
TTHL
TTLH
VCC = 4.5V
1
+25
o
C
-
15
ns
1
+125
o
C, -55
o
C
-
22
ns
Maximum Operating
Frequency (CPU,
CPD)
FMAX
VCC = 4.5V
1
+25
o
C
30
MHz
1
+125
o
C, -55
o
C
20
MHz
Setup Time Data to
Clock
TSU
VCC = 4.5V
1
+25
o
C
12
-
ns
1
+125
o
C, -55
o
C
18
-
ns
Hold Time Data to
Clock
TH
VCC = 4.5V
1
+25
o
C
3
-
ns
1
+125
o
C, -55
o
C
3
-
ns
Pulse Width MR
TW
VCC = 4.5V
1
+25
o
C
16
-
ns
1
+125
o
C, -55
o
C
24
-
ns
Pulse Width Clock
TW
VCC = 4.5V
1
+25
o
C
16
-
ns
1
+125
o
C, -55
o
C
24
-
ns
Removal Time MR
to Clock
TREM
VCC = 4.5V
1
+25
o
C
10
-
ns
1
+125
o
C, -55
o
C
15
-
ns
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
Spec Number
518767
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PDF描述
HCS273MS Radiation Hardened Octal D-Type Flip-Flop(抗輻射八D觸發(fā)器)
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