參數(shù)資料
型號(hào): HCS473PROM
廠商: Microchip Technology Inc.
英文描述: IC EEPROM SPI BUS 32KBIT 8-SOIC
中文描述: 跳碼編碼器和轉(zhuǎn)發(fā)器
文件頁(yè)數(shù): 54/68頁(yè)
文件大?。?/td> 1629K
代理商: HCS473PROM
HCS473
DS40035C-page 52
Preliminary
2002 Microchip Technology Inc.
TABLE 7-3:
AC CHARACTERISTICS, F
OSC
= 4 MHz
(1)
AC Characteristics
F
OSC
= 4 MHz
(1)
The min and max values below are due to HCS473 algorithm tolerances,
not variations due to supply voltage and temperature.
Symbol
Min
Typ
Max
Description
General HCS473 Timing
T
DB
10 ms
Debounce Time
T
QUE
2s
Que Window
T
PU
10.9 ms
Power-up Delay Time (includes button debounce)
T
PLL
19 ms
Encoder Mode PLL activation to first code word
T
LEDON
100 ms
LED ON Time
T
LEDOFF
500 ms
LED OFF Time
Communication from Transponder Reader to HCS473
T
CMD
1LF
TE
+100
μ
s
10.2 ms
T
TSCMD
1LF
TE
+100
μ
s
10.2 ms
Delay from Transponder Select ACK to next command
T
FINH
100
μ
s
1LF
TE
Time to leave LF on after last data bit’s rising edge
Response from HCS473 to Transponder Reader
T
SF
1ms+1LF
TE
3.5ms+1LF
TE
10ms+1LF
TE
Delay to wake-up Acknowledge sequence
T
TSACK
1LF
TE
+16
μ
s
1LF
TE
-11
μ
s
1LF
TE
+30
μ
s
1 LF
TE
1LF
TE
+44
μ
s
1LF
TE
+11
μ
s
Delay from TID pulse rising edge to TID Acknowledge
TID = 0
TID > 0
T
TPACK
157
μ
s
179
μ
s
212
μ
s
Delay to Transport Code Acknowledge
T
WRT
4 ms
10 ms
Delay to Write Acknowledge
T
AOACK
67
μ
s
89
μ
s
122
μ
s
Delay to anticollision off Acknowledge
T
IFF
5.64ms
Delay to IFF response - RF or LF response
T
READ
205
μ
s
227
μ
s
260
μ
s
Delay to read response - RF or LF response
T
HOP
19 ms
Delay to hopping code response - RF or LF response
T
DAMP
1.2 LF
TE
Delay from detecting LC rising edge to first damp pulse
T
DEMOD
16.4 ms
Demodulator mode window looking for edge on LC pin
Timing Element T
E
T
E
90
180
360
720
100
200
400
800
110
220
440
880
RFT
E
or LFT
E
RFBSL = LFBSL = 00
2
RFBSL = LFBSL = 01
2
RFBSL = LFBSL = 10
2
RFBSL = LFBSL = 11
2
Analog delays
T
FILTR
15
μ
s
HCS473 analog LF filter charge time
T
FILTF
70
μ
s
HCS473 analog LF filter discharge time
T
ANTR
Hardware design dependent
Cumulative LF antenna delay when field is turned on
T
ANTF
Hardware design dependent
Cumulative LF antenna delay when field is turned off
Note
1:
2:
F
OSC
= 4 MHz may be centered at the designer’s choice of supply voltage (V
DD
) and temperature.
LF
TE
is based on the HCS473’s timing, not the timing of the transponder reader. Therefore LF
TE
is subject to HCS473
oscillator variation.
Response timing accounts for
T
FILTR
but not for
T
ANTR
or
T
ANTF
, as they are design dependent. The system designer
must compensate communication accordingly for
T
ANTR
and
T
ANTF
.
Timing parameters are characterized but not tested.
3:
4:
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