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參數(shù)資料
| 型號(hào)： | HCS86DMSR |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | Radiation Hardened Quad 2-Input Exclusive OR Gate |
| 中文描述： | HC/UH SERIES, QUAD 2-INPUT XOR GATE, CDIP14 |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大小： | 176K |
| 代理商： | HCS86DMSR |
97
Specifications HCS86MS
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS
OPEN
GROUND
1/2 VCC = 3V
±
0.5V
VCC = 6V
±
0.5V
OSCILLATOR
50kHz
25kHz
STATIC BURN-IN I TEST CONDITIONS (Note 1)
3, 6, 8, 11
1, 2, 4, 5, 7, 9, 10, 12,
13
-
14
-
-
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
3, 6, 8, 11
7
-
1, 2, 4, 5, 9, 10, 12,
13, 14
-
-
DYNAMIC BURN-IN I TEST CONNECTIONS (Note 2)
-
7
3, 6, 8, 11
14
1, 2, 4, 5, 9, 10,
12, 13
-
NOTES:
1. Each pin except VCC and GND will have a resistor of 10K
±
5% for static burn-in.
2. Each pin except VCC and GND will have a resistor of 1K
±
5% for dynamic burn-in.
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
GROUND
VCC = 5V
±
0.5V
3, 6, 8, 11
7
1, 2, 4, 5, 9, 10, 12, 13, 14
NOTE: Each pin except VCC and GND will have a resistor of 47K
±
5% for irradiation testing.
Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number
518773
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