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參數(shù)資料
| 型號： | HCTS299D |
| 廠商： | Intersil Corporation |
| 英文描述： | Radiation Hardened 8-Bit Universal Shift Register; Three-State |
| 中文描述： | 輻射加固8位通用移位寄存器，三態(tài) |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 118K |
| 代理商： | HCTS299D |
624
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20
TOP VIEW
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20
TOP VIEW
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
S0
OE1
OE2
I/O6
I/O4
I/O2
Q0
I/O0
MR
GND
VCC
DS7
Q7
I/O7
S1
I/O5
I/O3
I/O1
CP
DS0
2
3
4
5
6
7
8
10
1
20
19
18
17
16
15
14
13
12
11
S0
OE1
OE2
I/O6
I/O4
I/O2
I/O0
Q0
MR
GND
VCC
S1
DS7
Q7
I/O7
I/O5
I/O3
I/O1
CP
DS0
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
HCTS299DMSR
-55
o
C to +125
o
C
Intersil Class S Equivalent
20 Lead SBDIP
HCTS299KMSR
-55
o
C to +125
o
C
Intersil Class S Equivalent
20 Lead Ceramic Flatpack
HCTS299D/Sample
+25
o
C
Sample
20 Lead SBDIP
HCTS299K/Sample
+25
o
C
Sample
20 Lead Ceramic Flatpack
HCTS299HMSR
+25
o
C
Die
Die
HCTS299MS
Radiation Hardened
8-Bit Universal Shift Register; Three-State
Features
3 Micron Radiation Hardened CMOS SOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/
Bit-Day (Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Fanout (Over Temperature Range)
-Bus Driver Outputs: 15 LSTTL Loads
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
-VIL = 0.8V Max
-VIH = VCC/2 Min
Input Current Levels Ii
≤
5
μ
A at VOL, VOH
Description
The Intersil HCTS299MS is a Radiation Hardened 8-bit shift/
storage register with three-state bus interface capability. The
register has four synchronous operating modes controlled by
the two select inputs (S0, S1). The mode select, the serial
data (DS0, DS7) and the parallel data (IO0 - IO7) respond
only to the low to high transition of the clock (CP) pulse. S0,
S1 and the data inputs must be one set up time period prior
to the clocks positive transition. The master reset (MR) is an
asynchronous active low input.
The HCTS299MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family
with TTL input compatibility.
August 1995
Spec Number
518640
File Number
3069.1
D
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HCTS299K | Radiation Hardened 8-Bit Universal Shift Register; Three-State |
| HCTS299KMSR | Radiation Hardened 8-Bit Universal Shift Register; Three-State |
| HCTS32HMSR | Radiation Hardened Quad 2-Input OR Gate |
| HCTS32D | Radiation Hardened Quad 2-Input OR Gate |
| HCTS32DMSR | Radiation Hardened Quad 2-Input OR Gate |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HCTS299DMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 8-Bit Universal Shift Register; Three-State |
| HCTS299HMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 8-Bit Universal Shift Register; Three-State |
| HCTS299K | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 8-Bit Universal Shift Register; Three-State |
| HCTS299KMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 8-Bit Universal Shift Register; Three-State |
| HCTS299MS | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 8-Bit Universal Shift Register; Three-State |
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