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參數(shù)資料
| 型號(hào)： | HCTS540MS |
| 廠商： | Intersil Corporation |
| 英文描述： | Quadruple 2-Input Positive-NOR Gates 20-LCCC -55 to 125 |
| 中文描述： | 輻射加固反向八路緩沖器/線路驅(qū)動(dòng)器，三態(tài) |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大?。?/td> | 135K |
| 代理商： | HCTS540MS |
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
HCTS540DMSR
-55
o
C to +125
o
C
Intersil Class S Equivalent
20 Lead SBDIP
HCTS540KMSR
-55
o
C to +125
o
C
Intersil Class S Equivalent
20 Lead Ceramic Flatpack
HCTS540D/Sample
+25
o
C
Sample
20 Lead SBDIP
HCTS540K/Sample
+25
o
C
Sample
20 Lead Ceramic Flatpack
HCTS540HMSR
+25
o
C
Die
Die
HCTS540MS
Radiation Hardened
Inverting Octal Buffer/Line Driver, Three-State
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20, LEAD FINISH C
TOP VIEW
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20, LEAD FINISH C
TOP VIEW
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
OE1
A0
A1
A2
A3
A4
A6
A5
A7
GND
VCC
Y0
Y1
Y2
OE2
Y3
Y4
Y5
Y6
Y7
OE1
A0
A1
A2
A3
A4
A5
A6
A7
GND
VCC
OE2
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
2
3
4
5
6
7
8
9
10
1
20
19
18
17
16
15
14
13
12
11
Features
3 Micron Radiation Hardened CMOS SOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/
Bit-Day (Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Fanout (Over Temperature Range)
- Bus Driver Outputs 15 LSTTL Loads
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
Input Current Levels Ii
≤
5
μ
A at VOL, VOH
Description
The Intersil HCTS540MS is a Radiation Hardened inverting
Octal Buffer/Line Driver, with two active-low output enables.
The output enable pins (OE1 and OE2) control the three-
state outputs. If either enable is high the outputs will be in
the high impedance state. For data output both enables
(OE1 and OE2) must be low.
The HCTS540MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS540MS is supplied in a 20 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
September 1995
Spec Number
518631
File Number
2232.2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HCTS574HMSR | Radiation Hardened Octal D-Type Flip-Flop, Three-State, Positive Edge Triggered |
| HCTS574D | Hex Inverters 14-CDIP -55 to 125 |
| HCTS574DMSR | Hex Inverters 14-CFP -55 to 125 |
| HCTS574K | Hex Inverters 20-LCCC -55 to 125 |
| HCTS574KMSR | Hex Inverters 14-CDIP -55 to 125 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HCTS541D | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Non-Inverting Octal Buffer/Line Driver, Three-State |
| HCTS541DMSR | 制造商:Intersil Corporation 功能描述:BFFR/LINE DRVR OCTAL NON-INV 3-ST CMOS 20PIN SBDIP - Rail/Tube |
| HCTS541HMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Non-Inverting Octal Buffer/Line Driver, Three-State |
| HCTS541K | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Non-Inverting Octal Buffer/Line Driver, Three-State |
| HCTS541KMSR | 制造商:Intersil Corporation 功能描述:BFFR/LINE DRVR OCTAL NON-INV 3-ST CMOS 20PIN CFLATPACK - Bulk |
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