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參數(shù)資料
| 型號(hào)： | HD404324 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 4-bit HMCS400-series microcomputer(4位單片微計(jì)算機(jī)) |
| 中文描述： | 4位HMCS400系列微電腦（4位單片微計(jì)算機(jī)） |
| 文件頁數(shù)： | 46/94頁 |
| 文件大?。?/td> | 573K |
| 代理商： | HD404324 |
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HD404328 Series
46
Timer B (TCBL and TLRL: $00A, TCBU and TLRU: $00B):
Eight-bit write-only timer load register
(TLRL and TLRU) and read-only timer counter (TCBL and TCBU) located at the same addresses. The
eight-bit configuration consists of lower and upper digits located at sequential addresses. A block diagram
of timer B is shown in figure 27.
Timer counter B is initialized by writing to timer load register B (TLR). In this case, the lower nibble must
be written to first. The contents of TLR are loaded into the timer counter at the same time the upper nibble
is written to, initializing the timer counter. TLR is initialized to $00 by MCU reset.
The count of timer B is obtained by reading timer counter B. In this case, the upper digit must be read first;
the count is latched when the upper nibble is read. An auto-reload function, input clock source, and
prescaler division ratio of timer B depend on the state of timer mode register B (TMB). When an external
event input is used as the input clock source of TMB, the D
8
/ZCD/
EVENT
pin must be set to function as
the ZCD or
EVENT
pin by setting port mode register B (PMRB: $011).
Timer B is initialized to the value set in TMB by software, and is then incremented by one by each clock
input. If an input is applied to timer B after it has reached $FF, an overflow is generated. In this case, if
the auto-reload function is enabled, timer B is initialized to its initial value; if auto-reload is disabled, the
timer is initialized to $00. The overflow sets the timer B interrupt request flag (IFTB: $002, bit 0).
Timer/counter B
(TCB)
EVENT
Selector
System
clock
PER
Prescaler S (PSS)
3
Timer load
register B lower
(TLRL)
Timer mode
register B
(TMB)
Timer load
register B upper
(TLRU)
Clock
Free-running/
reload timer
control signal
Timer latch
register B
(TLB)
Interrupt request
flag of timer B
(IFTB)
Overflow
I
÷
2
÷
4
÷
8
÷
÷
÷
÷
3
1
5
2
Figure 27 Timer B Free-Running and Reload Operation Block Diagram
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| HD404324FS | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:microcomputer designed to increase program productivity |
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| HD404324U | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:microcomputer designed to increase program productivity |
| HD404324UFS | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:microcomputer designed to increase program productivity |
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