參數(shù)資料
型號: HD404618TF
廠商: Hitachi,Ltd.
英文描述: 4-Bit Single-Chip Microcomputer
中文描述: 4位單片機
文件頁數(shù): 47/89頁
文件大?。?/td> 358K
代理商: HD404618TF
HD404618 Series
47
Table 21 Timer Mode Register A
TMA
Bit 3
Bit 2
Bit 1
Bit 0
Source Prescaler, Input Clock Period,
Operating Mode
0
0
0
0
PSS, 2048 t
cyc
PSS, 1024 t
cyc
PSS, 512 t
cyc
PSS, 128 t
cyc
PSS, 32 t
cyc
PSS, 8 t
cyc
PSS, 4 t
cyc
PSS, 2 t
cyc
PSW, 32 t
subcyc
PSW, 16 t
subcyc
PSW, 8 t
subcyc
PSW, 2 t
subcyc
PSW, 1/2 t
subcyc
Not used
Timer A mode
1
1
0
1
1
0
0
1
1
0
1
1
0
0
0
Time-base mode
1
1
0
1
1
0
0
1
1
0
PSW, TCA reset
1
Notes: 1. t
subcyc
= 244.14
μ
s (when 32.768-kHz crystal oscillator is used)
2. Timer counter overflow output period(s) = input clock period(s)
×
256
3. If PSW or TCA reset is selected while the LCD is operating, LCD operation halts (power switch
goes off).
When LCD is connected for display, the PSW and TCA reset periods must be set in the program
to the minimum.
4. In time base mode, the timer counter overflow output cycle must be greater than half of the
interrupt frame period (T/2 = t
RC
).
If 1/2 t
subcyc
is selected, t
RC
must be 7.8125 ms ((MIS1, MIS0) = (0, 1), see figure 14).
5. The division ratio must not be modified during time-base mode operation, otherwise an overflow
cycle error will occur.
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