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參數(shù)資料
| 型號(hào)： | HD404629R |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | AS Microcomputer Incorporating a DTMF Generator Circuit(微計(jì)算機(jī)帶雙音多頻發(fā)生器電路) |
| 中文描述： | 由于微機(jī)安裝有雙音多頻發(fā)電機(jī)斷路器（微計(jì)算機(jī)帶雙音多頻發(fā)生器電路） |
| 文件頁(yè)數(shù)： | 86/155頁(yè) |
| 文件大?。?/td> | 549K |
| 代理商： | HD404629R |
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HD404629R Series
86
In transfer state, writing data to serial mode register A (SMRA: $005) (06, 16) initializes the serial
interface, and STS wait state is entered.
If the state changes from transfer to another state, the serial interrupt request flag (IFS: $023, bit 2) is set
by the octal counter that is reset to 000.
Continuous clock output state (only in internal clock mode): Continuous clock output state is entered
only in internal clock mode. In this state, the serial interface does not transmit/
receive data but only outputs the transmit clock from the
SCK
pin.
When bits 1 and 0 (PMRA1, PMRA0) of port mode register A (PMRA: $004) are 00 in transmit clock
wait state and if the transmit clock is input (17), the serial interface enters continuous clock output state.
If serial mode register A (SMRA: $005) is written to in continuous clock output mode (18), STS wait
state is entered.
STS wait state
(Octal counter = 000,
transmit clock disabled)
Transmit clock wait state
(Octal counter = 000)
Transfer state
(Octal counter = 000)
MCU reset
00
SMRA write
04
STS instruction
01
Transmit clock
02
8 transmit clocks
03
STS instruction (IFS 1)
05
SMRA write (IFS 1)
06
External clock mode
STS wait state
(Octal counter = 000,
transmit clock disabled)
Transmit clock wait state
(Octal counter = 000)
Transfer state
(Octal counter = 000)
SMRA write
14
STS instruction
11
Transmit clock
12
15
STS instruction (IFS 1)
8 transmit clocks
13
Internal clock mode
Continuous clock output state
(PMRA 0, 1 = 00)
SMRA write
18
Transmit clock 17
16
Note: Refer to the Operating States section for the corresponding encircled numbers.
MCU reset
10
SMRA write (IFS 1)
Figure 71 Serial Interface State Transitions
Output Level Control in Idle States:
In idle states, that is, STS wait state and transmit clock wait state,
the output level of the SO pin can be controlled by setting bit 1 (SMRB1) of serial mode register B (SMRB:
$028) to 0 or 1. The output level control example is shown in figure 72. Note that the output level cannot
be controlled in transfer state.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HD404629RFS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-Bit Microcontroller |
| HD404629RH | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:AS Microcomputer Incorporating a DTMF Generator Circuit |
| HD404629RSERIES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| HD404629RTF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-Bit Microcontroller |
| HD404629TF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-Bit Microcontroller |
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