參數(shù)資料
型號: HD40C4341R
廠商: Hitachi,Ltd.
英文描述: 4-bit HMCS400-series microcomputer(4位單片微計(jì)算機(jī))
中文描述: 4位HMCS400系列微電腦(4位單片微計(jì)算機(jī))
文件頁數(shù): 18/100頁
文件大?。?/td> 610K
代理商: HD40C4341R
HD404344R Series/HD404394 Series
18
Bit 3
Bit 2
Bit 1
Bit 0
IE
IMTC
(IM of timer C)
IFTC
(IF of timer C)
IMTB
(IM of timer B)
IFTB
(IF of timer B)
IMS
(IM of serial)
IFS
(IF of serial)
IMAD
(IM of A/D)
IFAD
(IF of A/D)
$0000
$0001
$0002
$0003
Interrupt control bits area
IM0
(IM of
INT
0
)
IF0
(IF of
INT
0
)
RSP
(Reset SP bit)
(Interrupt
enable flag)
$020
$021
$022
$023
Register flag area
ADSF
(A/D start flag)
WDON
(Watchdog
on flag)
RAME
(RAM enable
flag)
Interrupt
request flag
Interrupt
mask
Interrupt
enable flag
SP:
Stack pointer
Bit 3
Bit 2
Bit 1
Bit 0
RAM Address
IAOF
(I
AD
off flag)
: Not used
IF:
IM:
IE:
Figure 3 Configuration of Interrupt Control Bits and Register Flag Areas
SEM/SEMD
The WDON bit can be reset by an MCU reset or by stop mode release with
STOPC
.
Do not use REM/REMD for the ADSF bit during A/D conversion.
If the TM or TMD instruction is excuted for the inhibited or non-existing bits, the value in
ST becomes invaild.
IE
IM
IAOF
IF
RAME
RSP
WDON
ADSF
Not used
REM/REMD
TM/TMD
Can be used
Can be used
Can be used
Can be used
Can be used
Not processed
Inhibited to access
Not processed
Can be used
Not processed
Not processed
Can be used
Can be used
Not processed
Inhibited to access
Inhibited to access
Can be used
Inhibited to access
Figure 4 Limitations for RAM Bit Manipulation Instructions
相關(guān)PDF資料
PDF描述
HD40C4342R 4-bit HMCS400-series microcomputer(4位單片微計(jì)算機(jī))
HD40C4344R 4-bit HMCS400-series microcomputer(4位單片微計(jì)算機(jī))
HD404342R 4-bit HMCS400-series microcomputer(4位單片微計(jì)算機(jī))
HD404344R 4-bit HMCS400-series microcomputer(4位單片微計(jì)算機(jī))
HD404391S 4-bit HMCS400-series microcomputer(4位單片微計(jì)算機(jī))
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