Table 1-3 Pin Functions (cont)
Type
Symbol
RFSH
Pin No.
I/O
Name and Function
Refresh
controller
87
Output
Refresh:
Indicates a refresh cycle
CS
3
88
Output
Row address strobe
RAS
:
Row address
strobe signal for DRAM connected to area 3
Output
Column address strobe
CAS
:
Column
address
strobe signal for DRAM connected to
area
3; used with 2
WE
DRAM.
Write enable
WE
:
Write enable signal for
DRAM connected to area 3; used with 2
CAS
DRAM.
Output
Upper write
UW
:
Write enable signal for
DRAM connected to area 3; used with 2
WE
DRAM.
Upper column address strobe
UCAS
:
Column address strobe signal for DRAM
connected to area 3; used with 2
CAS
DRAM.
Output
Lower write
LW
:
Write enable signal for DRAM
connected to area 3; used with 2
WE
DRAM.
Lower column address strobe
LCAS
:
Column address strobe signal for DRAM
connected to area 3; used with 2
CAS
DRAM.
RD
70
HWR
71
LWR
72
DREQ
1
,
DREQ
0
TEND
1
,
TEND
0
TCLKD to
TCLKA
9, 8
Input
DMA request 1 and 0:
DMAC activation
requests
94, 93
Output
Transfer end 1 and 0:
These signals indicate
that the DMAC has ended a data transfer
96 to 93
Input
Clock input D to A:
External clock inputs
TIOCA
4
to
TIOCA
0
4, 2, 99,
97, 95
Input/
output
Input capture/output compare A4 to A0:
GRA4 to GRA0 output compare or input
capture, or PWM output
TIOCB
4
to
TIOCB
0
5, 3, 100,
98, 96
Input/
output
Input capture/output compare B4 to B0:
GRB4 to GRB0 output compare or input
capture, or PWM output
TOCXA
4
TOCXB
4
6
Output
Output compare XA4:
PWM output
7
Output
Output compare XB4:
PWM output
DMA
controller
(DMAC)
16-bit
integrated
timer unit
(ITU)
12