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Rev. 4.00, 03/04, page 397 of 400
Index
A/D converter.........................................251
Sample-and-hold circuit......................258
Scan mode...........................................257
Single mode........................................257
Address break...........................................61
Addressing modes.....................................32
Absolute address...................................34
Immediate.............................................34
Memory indirect...................................35
Program-counter relative......................34
Register direct.......................................33
Register indirect....................................33
Register indirect with displacement......33
Register indirect with post-increment...33
Register indirect with pre-decrement....34
Clock pulse generators..............................67
Prescaler S............................................71
Prescaler W...........................................71
Subclock generator...............................70
System clock generator.........................68
Condition field..........................................31
Condition-code register (CCR).................17
CPU..........................................................11
EEPROM................................................263
Acknowledge......................................267
Acknowledge polling..........................270
Byte write ...........................................268
Current address read...........................270
EEPROM interface.............................266
Page write...........................................269
Random address read..........................271
Sequential read ...................................272
Slave address reference register
(ESAR)...............................................267
Slave addressing.................................267
Start condition.....................................266
Stop condition.....................................267
Effective address.......................................36
Effective address extension.......................31
Exception handling ...................................47
Reset exception handling......................54
Trap instruction.....................................47
Flash memory ...........................................85
Boot mode.............................................90
Boot program........................................90
Erase/erase-verify .................................96
Erasing units .........................................85
Error protection.....................................99
Hardware protection..............................99
Power-down state................................100
Program/program-verify.......................94
Programmer mode...............................100
Programming units................................85
Programming/erasing in user program
mode......................................................93
Software protection...............................99
General registers.......................................16
I/O ports..................................................103
I/O port block diagrams ......................365
I
2
C bus data format .................................233
I
2
C bus interface 2 (IIC2)........................219
Acknowledge......................................233
Bit synchronous circuit.......................250
Clock synchronous serial format.........242
Noise canceler.....................................244
Slave address.......................................233
Start condition.....................................233
Stop condition.....................................234
Transfer rate........................................223
Instruction set............................................22
Arithmetic operations instructions........24
Bit Manipulation instructions................27
Block data transfer instructions.............31
Branch instructions ...............................29
Data transfer instructions......................23