HD64645/64646
6
Timing Signal
D Clock (DCLK):
DCLK inputs the system clock.
M Clock (MCLK):
MCLK indicates memory cycle; DCLK is divided by four.
Display Timing (DISPTMG):
DISPTMG high indicates that the LCTC is reading display data.
Cursor Display (CUDISP):
CUDISP supplies cursor display timing; connect with MD12 in character
mode.
Skew 0 (SK0)/Skew 1 (SK1):
SK0 and SK1 control skew timing. Refer to Table 2.
Mode Select
The mode select pins ON/
OFF
, BLE, AT, G/
C
, and WIDE are ORed with the mode register (R22) to
determine the mode.
On/Off (ON/
OFF
):
ON/
OFF
switches display on and off (high = display on).
Blink Enable (BLE):
BLE high level enables attribute code “blinking” (MD13) and provides normal/blank
blinking of specified characters for 32 frames each.
Attribute (AT):
AT controls character attribute functions.
Graphic/Character (G/
C
):
G/
C
switches between graphic and character display mode (graphic display
when high).
Wide (WIDE):
WIDE switches between normal and wide display mode (high = wide display, low =
normal display).
Large Screen (LS):
LS controls a large screen. LS high provides a data transfer rate of 40 Mbits/s for a
graphic display. Also used to specify 8-bit LCD interface mode. For more details, refer to Table 10.
Dual/Single (D/
S
):
D/
S
switches between single and dual screen display (dual screen display when high).
Mode (MODE):
MODE controls easy mode. MODE high sets duty ratio, maximum number of rasters,
cursor start/end rasters, etc. (Refer to Table 8.)
Table 1
LCD Up Panel Data and LCD Down Panel Data
Single Screen
Pin Name
4-Bit Data
8-Bit Data
Dual Screen
LU0–LU3
Data output
Data output
Data output for upper screen
LD0–LD3
Disconnected
Data output
Data output for lower screen