Table 5-3 Interrupt Sources, Vector Addresses, and Priority (cont)
Vector Address
*
Vector
Number
Interrupt Source
Origin
Advanced Mode
Normal Mode
IPR
Priority
IMIA3 (compare match/
input capture A3)
ITU channel 3
36
H'0090 to H'0093
H'0048 to H'0049
IPRB7
IMIB3 (compare match/
input capture B3)
37
H'0094 to H'0097
H'004A to H'004B
OVI3 (overflow 3)
38
H'0098 to H'009B
H'004C to H'004D
Reserved
—
39
H'009C to H'009F
H'004E to H'004F
IMIA4 (compare match/
input capture A4)
ITU channel 4
40
H'00A0 to H'00A3
H'0050 to H'0051
IPRB6
IMIB4 (compare match/
input capture B4)
41
H'00A4 to H'00A7
H'0052 to H'0053
OVI4 (overflow 4)
42
H'00A8 to H'00AB
H'0054 to H'0055
Reserved
—
43
H'00AC to H'00AF H'0056 to H'0057
Reserved
—
44
H'00B0 to H'00B3
H'0058 to H'0059
—
45
H'00B4 to H'00B7
H'005A to H'005B
46
H'00B8 to H'00BB
H'005C to H'005D
47
H'00BC to H'00BF H'005E to H'005F
48
H'00C0 to H'00C3
H'0060 to H'0061
49
H'00C4 to H'00C7
H'0062 to H'0063
50
H'00C8 to H'00CB H'0064 to H'0065
51
H'00CC to H'00CF H'0066 to H'0067
ERI0 (receive error)
SCI
52
H'00D0 to H'00D3
H'0068 to H'0069
IPRB3
RXI0 (receive data
full)
53
H'00D4 to H'00D7
H'006A to H'006B
TXI0 (transmit data
empty)
54
H'00D8 to H'00DB H'006C to H'006D
TEI0 (transmit end)
55
H'00DC to H'00DF H'006E to H'006F
Reserved
—
56
H'00E0 to H'00E3
H'0070 to H'0071
IPRB2
57
H'00E4 to H'00E7
H'0072 to H'0073
58
H'00E8 to H'00EB
H'0074 to H'0075
59
H'00EC to H'00EF H'0076 to H'0077
ADI (A/D end)
A/D
60
H'00F0 to H'00F3
H'0078 to H'0079
IPRB1 Low
Note:
*
Lower 16 bits of the address.
91