6.2.1
6.2.2
6.2.3
Free-Running Counter (FRC) – H'FF92..................................................................126
Output Compare Registers A and B (OCRA and OCRB) – H'FF94.......................127
Input Capture Registers A to D (ICRA to ICRD) –
H'FF98, H'FF9A, H'FF9C, H'FF9E.........................................................................127
Timer Interrupt Enable Register (TIER) – H'FF90 .................................................129
Timer Control/Status Register (TCSR) – H'FF91 ...................................................131
Timer Control Register (TCR) – H'FF96 ................................................................134
Timer Output Compare Control Register (TOCR) – H'FF97..................................136
CPU Interface .......................................................................................................................137
Operation ..............................................................................................................................139
6.4.1
FRC Incrementation Timing....................................................................................139
6.4.2
Output Compare Timing..........................................................................................141
6.4.3
Input Capture Timing ..............................................................................................142
6.4.4
Setting of FRC Overflow Flag (OVF).....................................................................145
Interrupts...............................................................................................................................146
Sample Application...............................................................................................................146
Application Notes.................................................................................................................147
6.2.4
6.2.5
6.2.6
6.2.7
6.3
6.4
6.5
6.6
6.7
Section 7. 8-Bit Timers
.........................................................................................................153
7.1
Overview...............................................................................................................................153
7.1.1
Features....................................................................................................................153
7.1.2
Block Diagram.........................................................................................................153
7.1.3
Input and Output Pins..............................................................................................154
7.1.4
Register Configuration ............................................................................................155
7.2
Register Descriptions............................................................................................................155
7.2.1
Timer Counter (TCNT) – H'FFC8 (TMR0), H'FFD0 (TMR1)...............................155
7.2.2
Time Constant Registers A and B (TCORA and TCORB) –
H'FFCA and H'FFCB (TMR0), H'FFD2 and H'FFD3 (TMR1)..............................156
7.2.3
Timer Control Register (TCR) – H'FFC8 (TMR0), H'FFD0 (TMR1)....................156
7.2.4
Timer Control/Status Register (TCSR) – H'FFC9 (TMR0), H'FFD1 (TMR1).......158
7.3
Operation ..............................................................................................................................160
7.3.1
TCNT Incrementation Timing.................................................................................160
7.3.2
Compare Match Timing...........................................................................................161
7.3.3
External Reset of TCNT..........................................................................................163
7.3.4
Setting of TCSR Overflow Flag..............................................................................164
7.4
Interrupts...............................................................................................................................165
7.5
Sample Application...............................................................................................................165
7.6
Application Notes.................................................................................................................166
iii