ii
2.8
Memory Map......................................................................................................................
2.8.1
Memory Map........................................................................................................
Application Notes..............................................................................................................
2.9.1
Notes on Data Access...........................................................................................
2.9.2
Notes on Bit Manipulation....................................................................................
2.9.3
Notes on Use of the EEPMOV Instruction...........................................................
45
45
48
48
50
56
2.9
Section 3 Exception Handling
..........................................................................................
3.1
Overview............................................................................................................................
3.2
Reset...................................................................................................................................
3.2.1
Overview...............................................................................................................
3.2.2
Reset Sequence.....................................................................................................
3.2.3
Interrupt Immediately after Reset.........................................................................
3.3
Interrupts............................................................................................................................
3.3.1
Overview...............................................................................................................
3.3.2
Interrupt Control Registers ...................................................................................
3.3.3
External Interrupts................................................................................................
3.3.4
Internal Interrupts..................................................................................................
3.3.5
Interrupt Operations..............................................................................................
3.3.6
Interrupt Response Time.......................................................................................
3.4
Application Notes..............................................................................................................
3.4.1
Notes on Stack Area Use......................................................................................
3.4.2
Notes on Rewriting Port Mode Registers.............................................................
3.4.3
Interrupt Request Flag Clearing Method..............................................................
57
57
57
57
57
59
59
59
61
70
71
72
77
78
78
79
80
Section 4 Clock Pulse Generators
....................................................................................
4.1
Overview............................................................................................................................
4.1.1
Block Diagram......................................................................................................
4.1.2
System Clock and Subclock..................................................................................
4.2
System Clock Generator....................................................................................................
4.3
Subclock Generator............................................................................................................
4.4
Prescalers ...........................................................................................................................
4.5
Note on Oscillators ............................................................................................................
4.5.1
Definition of Oscillation Settling Standby Time..................................................
4.5.2
Notes on Use of Crystal Oscillator Element
(Excluding Ceramic Oscillator Element)..............................................................
83
83
83
83
84
87
89
90
90
92
Section 5 Power-Down Modes
.........................................................................................
5.1
Overview............................................................................................................................
5.1.1
System Control Registers......................................................................................
5.2
Sleep Mode........................................................................................................................ 101
5.2.1
Transition to Sleep Mode...................................................................................... 101
5.2.2
Clearing Sleep Mode ............................................................................................ 101
93
93
96