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Section 6 Clock Pulse Generator
6.1
Overview
The H8/3437 Series has a built-in clock pulse generator (CPG) consisting of an oscillator circuit, a
duty adjustment circuit, and a divider and a prescaler that generates clock signals for the on-chip
supporting modules.
6.1.1
Block Diagram
Figure 6.1 shows a block diagram of the clock pulse generator.
XTAL
EXTAL
Oscillator
circuit
Duty
adjustment
circuit
Frequency
divider (1/2)
CKDBL
(system
clock)
(for sup-
porting
modules)
Prescaler
P
/2 to
P
/4096
Figure 6.1 Block Diagram of Clock Pulse Generator
Input an external clock signal to the EXTAL pin, or connect a crystal resonator to the XTAL and
EXTAL pins. The system clock frequency () will be the same as the input frequency. This same
system clock frequency (
P
) can be supplied to timers and other supporting modules, or it can be
divided by two. The selection is made by software, by controlling the CKDBL bit.