參數(shù)資料
型號: HD66120T
廠商: Hitachi,Ltd.
英文描述: 240-Channel Segment Driver for Dot-Matrix Graphic Liquid Crystal Display(用于點陣圖形LCD的240通道段碼驅(qū)動器)
中文描述: 240通道段驅(qū)動的點陣圖形液晶顯示屏(用于點陣圖形液晶顯示的240通道段碼驅(qū)動器)
文件頁數(shù): 7/21頁
文件大?。?/td> 77K
代理商: HD66120T
HD66120T
7
Pin Functions
Power Supply
V
CC
, VLCD, GND:
V
CC
–GND1, GND2 supplies power to the internal logic circuits. VLCD–GND supplies
power to the LCD drive circuits. See Figure 1.
V1L, V1R, V2L, V2R, V3L, V3R, V4L, V4R:
Supply different levels of power to drive the LCD. V1 and
V2 are selected levels, and V3 and V4 are non-selected levels.
Control Signals
CL1:
Inputs display data latch pulses for latch circuit 2. Latch circuit 2 latches display data input from
latch circuit 1, and outputs LCD drive signals corresponding to the latched data, both at the falling edge of
each CL1 pulse.
CL2:
Inputs display data latch pulses for latch circuit 1. Latch circuit 1 latches display data input via D0–
D7 at the falling edge of each CL2 pulse.
M:
Changes LCD drive outputs to AC.
D0–D7:
Input display data. High-voltage level (V
CC
level) of data corresponds to a selected level and turns
an LCD pixel on, and low-voltage level (GND level) data corresponds to a non-selected level and turns an
LCD pixel off.
SHL:
Shifts the destinations of display data output, and determines which chip enable pin (
EIO1
or
EIO2
)
is an input and which is an output. See Figure 2.
EIO1
,
EIO2
:
If SHL is V
CC
level,
EIO1
inputs the chip enable signal, and
EIO2
outputs the signal. If SHL
is GND level,
EIO1
outputs the chip enable signal, and
EIO2
inputs the signal. The chip enable input pin of
the first HD66120T must be grounded, and those of the other HD66120Ts must be connected to the chip
enable output pin of the previous HD66120T. The chip enable output pin of the last HD66120T must be
open.
DISP
:
A low
DISP
sets LCD drive outputs Y1–Y240 to V2 level.
BS:
Selects either the 4-bit or 8-bit display data bus interface. If BS is V
CC
level, the 8-bit bus is selected,
and if BS is GND level, the 4-bit bus is selected. In 4-bit bus mode, data is latched via D0–D3; D4–D7
must be grounded.
LCD Drive Output
Y1–Y240:
Each Y outputs one of the four voltage levels V1, V2, V3, or V4, depending on the combination
of the M signal and display data levels. See Figure 3.
相關(guān)PDF資料
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HD66130T 320-channel Low-voltage Segment Driver for Dot-Matrix STN Liquid Crystal Display(點陣STN LCD低壓段碼驅(qū)動器)
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