參數(shù)資料
型號: HD66136T
廠商: Hitachi,Ltd.
英文描述: 400-Channel Segment Driver for a Dot-Matrix STN Liquid Crystal Display with Low-Voltage Drive(點陣STN LCD低壓段碼驅(qū)動器)
中文描述: 400通道段為驅(qū)動點矩陣STN液晶顯示器用低電壓驅(qū)動器(點陣STN液晶顯示器低壓段碼驅(qū)動器)
文件頁數(shù): 31/34頁
文件大?。?/td> 133K
代理商: HD66136T
HD66136T
31
AC Characteristics 2 (VCC = 4.5 to 5.5 V, V0–GND = 2.7 to 5.5 V and Ta = –30 to +75
°
C)
*1
Item
Symbol
Applicable Pins
Min.
Max.
Unit
Notes
Clock cycle time
tCYC
CL2
25
ns
Clock high-level width (1)
tCWH2
CL2
9
ns
Clock low-level width (1)
tCWL2
CL2
9
ns
Clock high-level width (2)
tCWH1
CL1
30
ns
Clock setup time
tSCL
CL1 and CL2
20
ns
Clock hold time
tHCL
CL1 and CL2
80
ns
Clock rise time
tr
CL1 and CL2
20
ns
3
Clock fall time
tf
CL1 and CL2
20
ns
3
Data setup time
tDS
D0 to D11, and CL2
9
ns
Data hold time
tDH
D0 to D11, and CL2
9
ns
M setup time
tMS
M and CL1
20
ns
M hold time
tMH
M and CL1
20
ns
Output delay time
tpd1
CL1, and Y1 to Y400
500
ns
4
CC setup time
tCCS
CC3 to CC4, and CL1
50
ns
CC hold time
Notes : 1. The electrical characteristics of shipped chips are guaranteed to a maximum temperature of
75
°
C.
2. The load must be less than 10 pF between the
EIO2
and
EIO1
connections of the HD66136Ts.
3. For high-speed operation, (tCYC – tCWH2 – tCWL2)/2 is the maximum clock rising or falling
time.
4. For the output delay time, connect the load circuit as shown in figure 22.
tCCH
CC3 to CC4, and CL1
50
ns
Test point
100 pF
Figure 22 Load Circuit for Output Delay Time
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