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參數(shù)資料
| 型號(hào)： | HD66503 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 240-Channel Common Driver with Internal LCD Timing Circuit(帶內(nèi)部LCD定時(shí)電路的240通道驅(qū)動(dòng)器) |
| 中文描述： | 240頻道共同的內(nèi)部LCD定時(shí)電路（帶內(nèi)部液晶定時(shí)電路的240通道驅(qū)動(dòng)器驅(qū)動(dòng)程序） |
| 文件頁(yè)數(shù)： | 3/28頁(yè) |
| 文件大小： | 107K |
| 代理商： | HD66503 |
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HD66503
3
Pin Description
Classi-
fication
Symbol
Pin No.
Pin Name
I/O
Number
of Pins Functions
Power
supply
V
CC1
,
V
CC2
GND
246
267
V
CC
Power
supply
2
V
CC
–GND: logic power supply
250
GND
Power
supply
1
V
EEL
,
V
EER
V1L, R
245
268
V
EE
Power
supply
2
V
–V
EE
: LCD drive circuits power
supply
V2L, R
V5L, R
V6L, R
244
269
241
272
242
271
243
270
V1
V2
V5
V6
Input
Input
Input
Input
2
2
2
2
LCD drive level power supply
See Figure 1.
Control
signals
M/
S
266
Master/slave Input
1
Controls the initiation and termination of
the LCD timing generator. In addition,
the input/output is determined of 4
signal pins: display data transfer clock
(CL1); first line marker (FLM);
alternating signal (M); and display off
control (
DOC
). See Table 1 for details.
DUTY
259
Duty
Input
1
Selects the display duty cycle.
Low level: 1/120 display duty ratio
High level:1/240 display duty ratio
MWS0 to
MWS5
257
256
255
254
253
252
MWS0
MWS1
MWS2
MWS3
MWS4
MWS5
Input
6
The number of line in the line
alternating waveform is set during
master mode.
The number of lines can be set
between 10 and 63.
When using the external alternating
signal or during slave mode, set the
number of lines to 0. See Table 2.
MEOR
258
M Exclusive-
OR
Input
1
During master mode, the signals
alternating waveform output from pin M
is selected.
During low level, the line alternating
waveform is output from pin M.
During high level, pin M outputs an
EOR (exclusive OR) waveform between
a line alternating waveform and frame
alternating waveform. Set the pin to low
during slave mode. See Table 3.
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