參數(shù)資料
    型號: HD66720
    廠商: Hitachi,Ltd.
    英文描述: Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver with Key Scan Function
    中文描述: 低功耗點陣液晶顯示控制器/鍵掃描功能驅(qū)動程序
    文件頁數(shù): 23/97頁
    文件大?。?/td> 513K
    代理商: HD66720
    HD66727
    23
    For example (Figure 3), when the address counter is 08H, a cursor is displayed at a position corresponding
    to DDRAM address “08”H.
    Cursor position
    Display position
    DDRAM address
    Note: The cursor/blink or white-black inversion control is
    also active when the address counter indicates the
    CGRAM or SEGRAM. However, it has no effect on the
    display.
    1
    2
    3
    4
    5
    6
    7
    8
    11
    9
    10
    12
    00
    01
    02
    03
    04
    05
    06
    07
    0A
    08
    09
    0B
    Figure 3 Cursor Position and DDRAM Address
    Multiplexing Liquid Crystal Display Driver Circuit
    The multiplexing liquid crystal display driver circuit consists of 34 common signal drivers (COM1 to
    COM32, COMS1, COMS2) and 60 segment signal drivers (SEG1 to SEG60). When the number of lines
    are selected by a program, the required common signal drivers automatically output drive waveforms,
    while the other common signal drivers continue to output deselection waveforms.
    Character pattern data is sent serially through a 60-bit shift register and latched when all needed data has
    arrived. The latched data then enables the segment signal drivers to generate drive waveform outputs.
    The shift direction of 60-bit data can be changed by the SGS bit. The shift direction of the common driver
    can also be changed by the CMS bit; select the direction appropriate for the device mounting configuration.
    When multiplexing drive is not used, or during the standby or sleep mode, all the above common and
    segment signal drivers output the V
    CC
    level, halting display.
    Annunciator Driver Circuit
    The static annunciator drivers, which are specially used for displaying icons and marks, consists of 1
    common signal driver (ACOM) and 12 segment signal drivers (ASEG1 to ASEG12). Since this driver
    circuit operates at the logic operating voltage (V
    CC
    to AGND), the LCD drive power supply circuit is not
    necessary, and low-power consumption can be achieved. It is suitable for mark indication during system
    standby because of its drive capability during the standby and sleep modes. When multiplexing drive is not
    used, or during the standby or sleep mode, all the above common and segment signal drivers output the V
    CC
    level, halting display.
    Tables 11 to 13 illustratate the correspondence between the annunciator addresses (AAN) and driver
    signals.
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