參數(shù)資料
型號： HD66787
廠商： Renesas Technology Corp.
英文描述： 528-channel, One-chip Driver with 262,144-color Display RAM and Power Supply Circuit for Low-temperature Poli-Si TFT (LTPS-TFT) Panels with Incorporat
中文描述： 528與262,144色顯示RAM和低電源電路通道，單芯片驅動器的溫度和旋鈴聲非晶硅TFT（薄膜晶體管）與Incorporat小組
文件頁數(shù)： 86/159頁
文件大?。?/td> 1607K
代理商： HD66787
HD66787
Preliminary
Rev.0.22, May.23.2003, page 86 of 159
The VSYNC-I/F has limits on the minimum speed and the frequency of the internal clock for the RAM
write through system interface. It requires a RAM write speed more than the result that is calculated from
the following formula.
Internal clock frequency (fosc) [Hz] = Frame frequency
×
(Display line (NL)
+
Front porch (FP)
+
Back
porch (BP))
×
16 clocks
×
Fluctuation
Minimum speed for RAM write (min.)[Hz]
>
176
×
Display line (NL) / {((Back porch (BP)
+
Display raster-row (NL) - Margin)
×
16 clock) / fosc}
Note 1) When RAM write does not start right after the falling edge of VSYNC, the time between the falling
edge of VSYNC and the start of RAM write must also be taken into account.
An example of RAM write speed and the frequency of the internal clock in the VSYNC interface mode is
as follows.
[Example]
Display size
Display line
Back/front porch
Frame frequency
176 RGB
×
240 lines
240 lines (NL = 11110)
14/2 lines (BP = 1110/FP = 0010)
60 Hz
Internal clock frequency (fosc) [Hz] = 60 Hz
×
(240
+
2
+
14)
×
16 Clock
×
1.1 / 0.9 = 300 kHz
When calculating the internal clock frequency, possible causes of fluctuations must also be taken into
consideration. The allowance for this fluctuation is ± 10 % from the center value, and the range of the
frequency must be within VSYNC period.
As the causes of fluctuations, the above example takes the variation in the LSI fabrication and the room
temperature into account. Other possible causes of fluctuations, such as variation in the external resistors
or the voltage change are not considered in the above example. It is necessary to make a setting with
enough margins to include the allowances for these factors.
Minimum speed for RAM writing [Hz]
>
176
×
240 / {((14
+
240 - 2) raster-rows
×
16 clock) / 300 kHz} = 3.14 MHz
In this case, RAM write is performed in synchronization with the falling edge of VSYNC.
When the data for one frame are written to RAM completely, there must be more than 2 raster-rows of
margin before the raster-row starts to drive for the next frame.
By writing data to RAM on the falling edge of VSYNC at the speed of 3.14 MHz or more, the data for the
whole screen on RAM are overwritten before the display operation starts. Accordingly, the flicker due to
updating moving picture data can be avoided while displaying a moving picture.
相關PDF資料
PDF描述
HD66840 Peripheral IC
HD66840F25 LCD Controller
HD66840F30 LCD Controller
HD66841FP LCD Controller
HD66841FS LCD Controller
相關代理商/技術參數(shù)
參數(shù)描述
HD66789 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:528-channel, One-chip Driver for Amorphous TFT Panels with 262,144-color display RAM, Power Supply Circuit, and Gate Circuit
HD667A66R 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:132 x 176-dot Graphics LCD Controller/Driver for 65K Colors
HD667B66R 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:132 x 176-dot Graphics LCD Controller/Driver for 65K Colors
HD66840 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC
HD66840F25 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LCD Controller
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