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參數(shù)資料
| 型號(hào)： | HD74AC166 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 8-bit Shift Register(8位移位寄存器) |
| 中文描述： | 8位的移位寄存器（8位移位寄存器） |
| 文件頁(yè)數(shù)： | 2/11頁(yè) |
| 文件大?。?/td> | 65K |
| 代理商： | HD74AC166 |
HD74AC166/HD74ACT166
2
Logic Symbol
15
PE P
0
D
S
CP
V
CC
=Pin16
GND=Pin8
P
1
P
2
P
3
P
4
P
5
P
6
P
7
1
7
6
1
2
MR
9
13
Q
7
2
3
4
5
10
11 12
14
Pin Names
CP
1
, CP
2
D
S
PE
P
0
to P
7
MR
Q
7
Clock Pulse Inputs (Active Rising Edge)
Serial Data Input
Parallel Enable Input (Active Low)
Parallel Data Inputs
Asynchronous Master Reset Input (Active Low)
Last Stage Output
Functional Description
Operation is synchronous (except for Master Reset) and state changes are initiated by the rising edge of
either clock input if the other clock input is Low. When one of the clock inputs is used as an active High
clock inhibt, it should attain the High state while the other clock is still in the High state following the
previous operation. When the Parallel Enable (
PE
) input is Low, data is loaded into the register from the
Parallel Data (P
0
to P
7
) inputs on the next rising edge of the clock. When
PE
is High, information is shifted
from the Serial Data (D
S
) input to Q
0
and all data in the register is shifted one bit position (i.e., Q
0
→
Q
1
, Q
1
→
Q
2
, etc.) on the rising edge of the clock.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HD74AC166/HD74ACT166 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| HD74AC166AFPEL | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:8-bit Shift Register |
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| HD74AC166FP | 制造商:Renesas Electronics 功能描述:74AC 8-Bit Parallel-in / Serial-out Shift Register 制造商:Renesas Electronics 功能描述:74AC 8-Bit Parallel-in / Serial-out Shift Register Bulk |
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