參數(shù)資料
型號: HD74HC237
廠商: Hitachi,Ltd.
英文描述: 3-to-8-line Decoder/Demultiplexer with Address Latch
中文描述: 3至8線解碼器/解復(fù)用器的地址鎖存器
文件頁數(shù): 1/9頁
文件大?。?/td> 57K
代理商: HD74HC237
HD74HC237
3-to-8-line Decoder/Demultiplexer with Address Latch
Description
The HD74HC237 decodes a three-bit Address to one-of-eight active-high outputs. The device has a
transparent latch for storage of the Address. Two Chip Selects, one active-low and one active-high, are
provided to facilitate the demultiplexing, cascading, and chip-selecting functions.
The demultiplexing function is accomplished by using the Address inputs to select the desired device
output, and then by using one of the Chip Selects as a data input while holding the other one active.
The HD74HD237 is the noninverting version of the HD74HC137.
Features
High Speed Operation: t
pd
(Data to Y) = 19 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1 μA max
Low Quiescent Supply Current: I
CC
(static) = 4 μA max (Ta = 25°C)
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