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參數(shù)資料
| 型號： | HD74LV126 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Quad. Bus Buffer Gates with 3-state Outputs |
| 中文描述： | 四?？偩€緩沖器蓋茨三態(tài)輸出 |
| 文件頁數(shù)： | 1/14頁 |
| 文件大小： | 58K |
| 代理商： | HD74LV126 |
HD74LV126A
Quad. Bus Buffer Gates with 3-state Outputs
ADE-205-259 (Z)
1st Edition
March 1999
Description
The HD74LV126A features independent line drivers with three state outputs. Each output is disabled when
the associated output enable (OE) input is low. To ensure the high impedance state during power up or
power down, OE should be connected to GND through a pull-down resistor; the minimum value of the
resistor is determined by the current souring capability of the driver. Low-voltage and high-speed operation
is suitable for the battery-powered products (e.g., notebook computers), and the low-power consumption
extends the battery life.
Features
V
CC
= 2.0 V to 5.5 V operation
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25
°
C)
Typical V
OH
undershoot > 2.3 V (@V
CC
= 3.3 V, Ta = 25
°
C)
Output current
±
8 mA (@V
CC
= 3.0 V to 3.6 V),
±
16 mA (@V
CC
= 4.5 V to 5.5 V)
Function Table
Inputs
OE
A
Output Y
H
H
H
H
L
L
L
Note:
X
Z
H: High level
L: Low level
X: Immaterial
Z: High impedance
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