- 您現(xiàn)在的位置：買賣IC網 > PDF目錄370484 > HD74LV165A (Hitachi,Ltd.) Parallel-Load 8-bit Shift Register(并行載入8位移位寄存器) PDF資料下載
參數(shù)資料
| 型號： | HD74LV165A |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Parallel-Load 8-bit Shift Register(并行載入8位移位寄存器) |
| 中文描述： | 并聯(lián)負載8位的移位寄存器（并行載入8位移位寄存器） |
| 文件頁數(shù)： | 9/17頁 |
| 文件大小： | 75K |
| 代理商： | HD74LV165A |
HD74LV165A
9
Switching Characteristics (cont)
V
CC
= 5.0
±
0.5 V
Ta = 25
°
C
Ta = –40 to 85
°
C
Item
Symbol
Min
Typ
Max
Min
Max
Unit
Test
Conditions
FROM
(Input)
TO
(Output)
Maximum
clock
fre
quency
fmax
110
165
—
90
—
MHz
C
L
= 15 pF
95
125
—
85
—
C
L
= 50 pF
Propa-
gation
delay time
t
PLH
/t
PHL
—
6.0
9.9
1.0
11.5
ns
C
L
= 15 pF
SH/
LD
Q
H
or
Q
H
—
7.7
11.9
1.0
13.5
C
L
= 50 pF
—
6.0
9.9
1.0
11.5
C
L
= 15 pF
CLK
—
7.7
11.9
1.0
13.5
C
L
= 50 pF
—
6.0
9.0
1.0
10.5
C
L
= 15 pF
H
—
7.6
11.0
1.0
12.5
C
L
= 50 pF
Setup time
t
su
3.5
—
—
3.5
—
ns
CLK INH before CLK
↑
5.0
—
—
5.0
—
data before SH/
LD
↑
4.0
—
—
4.0
—
ns
SH/
LD
high before CLK
↑
4.0
—
—
4.0
—
SER before CLK
↑
Hold time
t
h
1.0
—
—
1.0
—
ns
PAR data after SH/
LD
↑
0.5
—
—
0.5
—
SER data after CLK
↑
0.5
—
—
0.5
—
SH/
LD
high atfer CLK
↑
Pulse
width
t
w
5.0
—
—
6.0
—
ns
SH/
LD
low
4.0
—
—
4.0
—
CLK H or L
相關PDF資料 |
PDF描述 |
|---|---|
| HD74LV166A | Parallel-Load 8-bit Shift Register(并行載入8位移位寄存器) |
| HD74LV174A | Hex D-type Flip-Flops with Clear |
| HD74LV175A | Quad. D-type Flip-Flops with Clear(帶清除的四D觸發(fā)器) |
| HD74LV1G00A | 2?input NAND Gate |
| HD74LV1G04A | Inverter |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HD74LV1G00ACME-E | 制造商:Renesas Electronics 功能描述:74LV Single 2-Input NAND Gate Bulk 制造商:Renesas Electronics Corporation 功能描述:HD74LV1G00ACME-E |
| HD74LV1G02ACME-E | 制造商:Renesas Electronics Corporation 功能描述:HD74LV1G02ACME-E |
| HD74LV1G02AVSE-E | 制造商:Renesas Electronics Corporation 功能描述:Logic,74LV1G-A,2 input NOR,VSON-5 |
| HD74LV1G04ACME-E | 制造商:Renesas Electronics Corporation 功能描述:HD74LV1G04ACME-E |
| HD74LV1G04AVSE-E | 制造商:Renesas Electronics Corporation 功能描述:Logic,74LV1G-A, Inverter,VSON5 |
發(fā)布緊急采購，3分鐘左右您將得到回復。