參數(shù)資料
型號(hào): HEC4094BT
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: 8-stage shift-an-store register
封裝: HEC4094BT<SOT109-1 (SO16)|<<http://www.nxp.com/packages/SOT109-1.html<1<week 6, 2004,;HEF4094BP<SOT38-4 (DIP16)|<<http://www.nxp.com/packages/SOT38-4.html<1<Always
文件頁(yè)數(shù): 4/19頁(yè)
文件大?。?/td> 160K
代理商: HEC4094BT
HEF4094B_8
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NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 08 — 2 April 2010
4 of 19
NXP Semiconductors
HEF4094B
8-stage shift-and-store register
6. Functional description
[1]
At the positive clock edge, the information in the 7th register stage is transferred to the 8th register stage and the QSn outputs.
H = HIGH voltage level; L = LOW voltage level; X = don’t care;
= positive-going transition;
= negative-going transition;
Z = HIGH-impedance OFF-state; NC = no change;
Q6S = the data in register stage 6 before the LOW to HIGH clock transition;
Q7S = the data in register stage 7 before the HIGH to LOW clock transition.
Table 3.
Inputs
CP
Function table
[1]
Parallel outputs
QP0
Z
Z
NC
L
H
NC
Serial outputs
QS1
Q6S
NC
Q6S
Q6S
Q6S
NC
OE
L
L
H
H
H
H
STR
X
X
L
H
H
H
D
X
X
X
L
H
H
QPn
Z
Z
NC
QPn
1
QPn
1
NC
QS2
NC
Q7S
NC
NC
NC
Q7S
Fig 5.
Timing diagram
001aaf117
CLOCK INPUT
DATA INPUT
STROBE INPUT
OUTPUT ENABLE INPUT
INTERNAL Q0S (FF 0)
OUTPUT QP0
INTERNAL Q6S (FF 6)
OUTPUT QP6
SERIAL OUTPUT QS1
SERIAL OUTPUT QS2
Z-state
Z-state
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