參數(shù)資料
型號: HEF4013BP
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: Dual D-type flip-flop
封裝: HEC4013BT<SOT108-1 (SO14)|<<http://www.nxp.com/packages/SOT108-1.html<1<week 32, 2004,;HEC4013BT<SOT108-1 (SO14)|<<http://www.nxp.com/packages/SOT108-1.html<1<week
文件頁數(shù): 3/16頁
文件大小: 165K
代理商: HEF4013BP
HEF4013B
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NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 13 September 2011
3 of 16
NXP Semiconductors
HEF4013B
Dual D-type flip-flop
6. Pinning information
6.1 Pinning
6.2 Pin description
7. Functional description
[1]
H = HIGH voltage level; L = LOW voltage level; X = don’t care;
= LOW-to-HIGH clock transition.
Fig 3.
Pin configuration
HEF4013B
1Q
V
DD
1Q
2Q
1CP
2Q
1CD
2CP
1D
2CD
1SD
2D
V
SS
2SD
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1
2
3
4
5
6
7
8
10
9
12
11
14
13
Table 2.
Symbol
1Q, 2Q
1Q, 2Q
1CP, 2CP
1CD, 2CD
1D, 2D
1SD, 2SD
V
SS
V
DD
Pin description
Pin
1, 13
2, 12
3, 11
4, 10
5, 9
6, 8
7
14
Description
true output
complement output
clock input (LOW to HIGH edge-triggered)
asynchronous clear-direct input (active HIGH)
data input
asynchronous set-direct input (active HIGH)
ground (0 V)
supply voltage
Table 3.
Control
nSD
H
L
H
L
L
Function table
[1]
Input
nD
X
X
X
L
H
Output
nQ
H
L
H
L
H
nCD
L
H
H
L
L
nCP
X
X
X
nQ
L
H
H
H
L
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