參數(shù)資料
型號: HEF4015BP
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: Dual 4-bit static shift register
封裝: HEF4015BP<SOT38-4 (DIP16)|<<http://www.nxp.com/packages/SOT38-4.html<1<Always Pb-free,;HEF4015BT<SOT109-1 (SO16)|<<http://www.nxp.com/packages/SOT109-1.html<1<week
文件頁數(shù): 6/15頁
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代理商: HEF4015BP
HEF4015B
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NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 14 September 2011
6 of 15
NXP Semiconductors
HEF4015B
Dual 4-bit static shift register
11. Dynamic characteristics
[1]
The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C
L
in pF).
Table 7.
V
SS
= 0 V; C
L
= 50 pF; T
amb
= 25
C.
Symbol
Parameter
t
PHL
HIGH to LOW
propagation delay
Dynamic characteristics
Conditions
nCP to Qn;
see
Figure 4
V
DD
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
Extrapolation formula
[1]
Min
103 ns + (0.55 ns/pF)C
L
44 ns + (0.23 ns/pF)C
L
32 ns + (0.16 ns/pF)C
L
78 ns + (0.55 ns/pF)C
L
34 ns + (0.23 ns/pF)C
L
27 ns + (0.16 ns/pF)C
L
93 ns + (0.55 ns/pF)C
L
44 ns + (0.23 ns/pF)C
L
32 ns + (0.16 ns/pF)C
L
10 ns + (1.00 ns/pF)C
L
9 ns + (0.42 ns/pF)C
L
6 ns + (0.28 ns/pF)C
L
Typ
130
55
40
105
45
35
120
55
40
60
30
20
15
10
5
20
Max
260
110
80
210
90
70
240
110
80
120
60
40
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
-
-
-
-
-
-
-
-
-
-
-
+25
+25
+20
40
nMR to Qn;
see
Figure 6
t
PLH
LOW to HIGH
propagation delay
nCP to Qn
see
Figure 4
t
t
transition time
see
Figure 4
t
su
set-up time
nD to nCP;
see
Figure 5
t
h
hold time
nD to nCP;
see
Figure 5
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
20
15
60
30
20
80
30
24
50
30
20
7
15
22
10
8
30
15
10
40
15
12
20
10
5
15
30
44
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
t
W
pulse width
nCP LOW;
minimum width;
see
Figure 5
nMR HIGH;
minimum width;
see
Figure 6
t
rec
recovery time
pin nMR;
see
Figure 6
f
max
maximum frequency
see
Figure 5
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