參數(shù)資料
型號(hào)： HEF4093BU
廠商： NXP Semiconductors N.V.
元件分類： 通用總線功能
英文描述： Quad 2-input NAND Schmitt trigger
中文描述： 四2輸入與非施密特觸發(fā)器
封裝： HEC4093BT<SOT108-1 (SO14)|<<http://www.nxp.com/packages/SOT108-1.html<1<week 32, 2004,;HEC4093BT<SOT108-1 (SO14)|<<http://www.nxp.com/packages/SOT108-1.html<1<week
文件頁(yè)數(shù)： 5/15頁(yè)
文件大?。?/td> 367K
代理商： HEF4093BU
HEF4093B
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 7 — 1 September 2010
5 of 15
NXP Semiconductors
HEF4093B
Quad 2-input NAND Schmitt trigger
11. Dynamic characteristics
Table 7.
T
amb
= 25
°
C; C
L
= 50 pF; t
r
= t
f
≤
20 ns; wave forms see
Figure 4
; test circuit see
Figure 5
; unless otherwise specified.
Symbol
Parameter
Conditions
V
DD
t
PHL
HIGH to LOW
propagation delay
10 V
15 V
t
PLH
LOW to HIGH
propagation delay
10 V
15 V
t
THL
HIGH to LOW output
transition time
10 V
15 V
t
TLH
LOW to HIGH output
transition time
HIGH
10 V
15 V
[1]
Typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (C
L
in pF).
Table 8.
V
SS
= 0 V; t
r
= t
f
≤
20 ns; T
amb
= 25
°
C.
Symbol
Parameter
P
D
dynamic power
dissipation
Dynamic characteristics
Extrapolation formula
[1]
63 ns + (0.55 ns/pF)C
L
29 ns + (0.23 ns/pF)C
L
22 ns + (0.16 ns/pF)C
L
58 ns + (0.55 ns/pF)C
L
29 ns + (0.23 ns/pF)C
L
22 ns + (0.16 ns/pF)C
L
10 ns + (1.00 ns/pF)C
L
9 ns + (0.42 ns/pF)C
L
6 ns + (0.28 ns/pF)C
L
10 ns + (1.00 ns/pF)C
L
9 ns + (0.42 ns/pF)C
L
6 ns + (0.28 ns/pF)C
L
Min
-
-
-
-
-
-
-
-
-
-
-
-
Typ
90
40
30
85
40
30
60
30
20
60
30
20
Max
185
80
60
170
80
60
120
60
40
120
60
40
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
nA or nB to nY
5 V
nA or nB to nY
5 V
nY to LOW
5 V
nA or nB to
5 V
Dynamic power dissipation
V
DD
5 V
10 V
15 V
Typical formula
P
D
= 1300
×
f
i
+
Σ
(f
o
×
C
L
)
×
V
DD2
(
μ
W)
P
D
= 6400
×
f
i
+
Σ
(f
o
×
C
L
)
×
V
DD2
(
μ
W)
P
D
= 18700
×
f
i
+
Σ
(f
o
×
C
L
)
×
V
DD2
(
μ
W)
where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
Σ
(f
o
×
C
L
) = sum of the outputs;
V
DD
= supply voltage in V.
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