參數(shù)資料
型號: HFBR-5107
英文描述: 820 nm,100VG-AnyLAN Multimode Fiber Transceivers in Low Cost 1x9 Package Style(820 nm,100VG-AnyLAN 多模式光收發(fā)器(低價格 1x9封裝類型))
中文描述: 820納米,100VG - AnyLAN多模光纖收發(fā)器的低成本1x9封裝形式(820納米,100VG - AnyLAN多模式光收發(fā)器(低價格1x9封裝類型))
文件頁數(shù): 7/16頁
文件大小: 214K
代理商: HFBR-5107
7
Regulatory Compliance Table
Feature
Electrostatic Discharge
(ESD) to the Electrical Pins
Electrostatic Discharge
(ESD) to the Duplex SC
Receptacle
Electromagnetic
Interference (EMC)
Test Method
MIL-STD-883C
Method 3015.4
Variation of
IEC 801-2
Performance
Certified to Class 1 (0 to 1999 Volts) Withstand up
to 1800 V applied between electrical pins.
Typically withstand at least 25 kV without damage
when the Duplex SC Connector Receptacle
is contacted by a Human Body Model probe.
Typically provide a 10 dB margin to the noted
standard limits when tested at a certified test range
with the transceiver mounted to a circuit card
without a chassis enclosure.
Typically show no measurable effect from a
10 V/m field swept from 10 to 450 MHz applied
to the transceiver when mounted to a circuit card
without a chassis enclosure.
FCC Class B
CENELEC CEN55022
Class B (CISPR 22B)
VCCI Class 2
Variation of IEC 801-3
Immunity
well. It is further recommended
that a contiguous ground plane
be provided in the circuit board
directly under the transceiver to
provide a low inductance ground
for signal return current. This
recommendation is in keeping
with good high frequency board
layout practices.
Board Layout – Hole
Pattern
This Agilent transceiver complies
with the circuit board “Common
Transceiver Footprint” hole
pattern defined in the original
multisource announcement which
defined the 1x9 package style.
This drawing is reproduced in
Figure 8 with the addition of
ANSI Y14.5N compliant
dimensioning to be used as a
guide in the mechanical layout of
your circuit board.
Board Layout – Art Work
The Applications Engineering
group has developed Gerber file
artwork for a multilayered printed
circuit board layout incorporating
the above recommendations.
Contact your local Agilent sales
representative for details.
Board Layout –
Mechanical
For applications providing a
choice of either a duplex SC or a
duplex ST connector interface,
while utilizing the same pinout on
the printed circuit board, the ST
port needs to protrude from the
chassis panel a minimum of 9.53
mm for sufficient clearance to
install the ST connector.
Please refer to Figure 8a for a
mechanical layout detailing the
recommended location of the
duplex SC and duplex ST
transceiver packages in relation
to the chassis panel.
Regulatory Compliance
These transceiver products are
intended to enable commercial
system designers to develop
equipment that complies with the
various international regulations
governing certification of Infor-
mation Technology Equipment.
See the Regulatory Compliance
Table for details. Additional
information is available from your
Agilent sales representative.
Electrostatic Discharge
(ESD)
There are two design cases in
which immunity to ESD damage
is important.
The first case is during handling
of the transceiver prior to
mounting it on the circuit board.
It is important to use normal ESD
handling precautions for ESD
sensitive devices. These precau-
tions include using grounded
wrist straps, work benches, and
floor mats in ESD controlled
areas.
The second case is static
discharges to the exterior of the
equipment chassis containing the
transceiver parts. To the extent
that the duplex SC connector is
exposed to the outside of the
equipment chassis it may be
subject to whatever ESD system
level test criteria that the equip-
ment is intended to meet.
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