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參數(shù)資料
| 型號(hào)： | HI1-565AJD-5 |
| 廠商： | Intersil |
| 文件頁(yè)數(shù)： | 7/9頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | CONV D/A 12BIT 6.7MHZ 24-DIP |
| 標(biāo)準(zhǔn)包裝： | 165 |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 250mW |
| 工作溫度： | 0°C ~ 75°C |
| 安裝類(lèi)型： | 通孔 |
| 封裝/外殼： | 24-CDIP（0.600"，15.24mm） |
| 供應(yīng)商設(shè)備封裝： | 24-DIP |
| 包裝： | 管件 |
| 輸出數(shù)目和類(lèi)型： | 1 電流，單極；1 電流，雙極 |
| 采樣率（每秒）： | 6.7M |
7
Other Considerations
Grounds
The Hl-565A has two ground terminals, pin 5 (REF GND)
and pin 12 (PWR GND). These should not be tied together
near the package unless that point is also the system signal
ground to which all returns are connected. (If such a point
exists, then separate paths are required to pins 5 and 12).
The current through pin 5 is near-zero DC (Note 1); but pin
12 carries up to 1.75mA of code-dependent current from bits
1, 2, and 3. The general rule is to connect pin 5 directly to
the system “quiet” point, usually called signal or analog
ground. Connect pin 12 to the local digital or power ground.
Then, of course, a single path must connect the
analog/signal and digital/power grounds.
Layout
Connections to pin 9 (IOUT) on the Hl-565A are most critical
for high speed performance. Output capacitance of the DAC
is only 20pF, so a small change or additional capacitance
may alter the op amp’s stability and affect settling time.
Connections to pin 9 should be short and few. Component
leads should be short on the side connecting to pin 9 (as for
feedback capacitor C). See the Settling Time section.
Bypass Capacitors
Power supply bypass capacitors on the op amp will serve
the HI-565A also. If no op amp is used, a 0.01
F ceramic
capacitor from each supply terminal to pin 12 is sufficient,
since supply current variations are small.
Current Cancellation
Current cancellation is a two step process within the
HI-565A in which code dependent variations are eliminated,
then the resulting DC current is supplied internally. First an
auxiliary 9-bit R-2R ladder is driven by the complement of
the DACs input code. Together, the main and auxiliary
ladders draw a continuous 2.25mA from the internal ground
node, regardless of input code. Part of this DC current is
supplied by the zener voltage reference, and the remainder
is sourced from the positive supply via a current mirror which
is laser trimmed for zero current through the external
terminal (pin 5).
FIGURE 3A.
FIGURE 3B.
OUT
PULSE
GENERATOR
NO. 1
PULSE
GENERATOR
NO. 2
20V
±20%
BIAS
TURN ON
TURN OFF
HI-565A
24
23
14
13
8
11
10
9
5
5K
2.5K
9.95K
2mA
LSB
12
10
0.1
F
200K
SCHOTTKY
DIODES
STROBE
COMP
OUT
+5V
DVM
OUT
SYNC
TRIG
90
~100kHz
(A)
(B)
(C)
IN (D)
OUT
IN
NC
P
VLSB
SUPPLY
DIGITAL
INPUT
DAC
OUTPUT
COMP.
STROBE
EQUAL
COMP.
OUT
SETTLING TIME
tD = COMPARATOR DELAY
50%
-0.5 LSB
+3V
0V
-400mV
2V
0.8V
4V
0V
tX
BRIGHTNESS
50%
(B)
(TURN
OFF)
(A)
(C)
(D)
HI-565A
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相關(guān)代理商/技術(shù)參數(shù) |
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| HI1-565AKD-5 | 制造商:Rochester Electronics LLC 功能描述:24 CDIP, 0+75, +15V,12-BIT D/A CONVERTER W/REF - Bulk 制造商:Harris Corporation 功能描述: 制造商:Intersil Corporation 功能描述: |
| HI1-565ASD/883 | 制造商:Intersil Corporation 功能描述:DAC SGL R-2R 12-BIT 24PIN SBDIP - Rail/Tube 制造商:Rochester Electronics LLC 功能描述:DAC 12BIT 6.7MHZ 0.25LSB 24CDIP /883 - Bulk |
| HI1-565ASD-2 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:High Speed, Monolithic D/A Converter with Reference |
| HI1-565ASD-8 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HI1-565ATD/883 | 制造商:Rochester Electronics LLC 功能描述:24 CDIP, -55+125,+15V,12-BIT D/A CONVERTER W/REF - Bulk 制造商:Harris Corporation 功能描述: |
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