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參數(shù)資料
| 型號： | HI1178JCQ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 2/11頁 |
| 文件大小： | 0K |
| 描述： | CONV D/A 8BIT TRPL 40MHZ 48-PQFP |
| 標(biāo)準(zhǔn)包裝： | 600 |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 3 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 240mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-BQFP |
| 供應(yīng)商設(shè)備封裝： | 48-MQFP（12x12） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 6 電流，單極 |
| 采樣率（每秒）： | 40M |
10
Notes On Operation
How to select the output resistance
The HI1178 is a current-output D/A converter. To obtain
the output voltage, connect the resistance to IO pin (RO,
GO, BO). For specifications we have:
Calculate the output resistance value from the relation of
VFS = IFS X R. Also, 16 times resistance of the output
resistance is connected to reference current pin IREF. In
some cases, however, this turns out to be a value that
does not actually exist. In such a case a value close to it
can be used as a substitute. Here please note that VFS
becomes VFS =VREF X 16R/R'. R is the resistance con-
nected to IO while R' is connected to IREF. Increasing the
resistance value can curb power consumption. On the
other hand glitch energy and data settling time will
inversely increase. Set the most suitable value according
to the desired application.
Phase Relation Between Data and Clock
To obtain the expected performance as a D/A converter, it
is necessary to set properly the phase relation between
data and clock applied from the exterior. Be sure to satisfy
the provisions of the set up time (tS) and hold time (tH) as
stipulated in the Electrical Characteristics.
VDD, VSS
To reduce noise effects separate analog and digital
systems in the device periphery. For VDD pins, both digital
and analog, bypass respective GNDs by using a ceramic
capacitor of 0.1
F, as close as possible to the pin.
Application Circuit
FIGURE 11.
DVDD
AVDD
36
24
23
22
21
20
19
18
17
13 14 15 16
1
2
3
4
5
6
7
8
9
10
11
12
38
39
40
41
42
43
44
45
46
47
37
48
35
DVSS
CLOCK IN
DVSS
0.1
AVSS
(BCK)
(GCK)
(RCK)
(MS
B)
(LSB)
1K
AVSS
3.3K
2V
(LSB)
(M
S
B
)
(MSB)
G(GREEN)IN
R(RED)IN
B(BLUE)IN
AVSS
AVDD
200
R(RED)OUT
G(GREEN)OUT
200
AVSS
200
B(BLUE)OUT
0.1
(LSB)
34
31
30
29
28
27
26
25
33
32
HI1178
Output Full Scale Voltage
VFS = less than 2.0 [V]
Output Full Scale Current
IFS = less than 15 [mA]
HI1178
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