參數(shù)資料
型號(hào): HI3-0303-5Z
廠(chǎng)商: Intersil
文件頁(yè)數(shù): 1/11頁(yè)
文件大小: 0K
描述: IC SWITCH DUAL DPST 14DIP
標(biāo)準(zhǔn)包裝: 25
功能: 開(kāi)關(guān)
電路: 2 x SPDT - NC/NO
導(dǎo)通狀態(tài)電阻: 50 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 5 V ~ 34 V,±5 V ~ 20 V
電流 - 電源: 90nA
工作溫度: 0°C ~ 75°C
安裝類(lèi)型: 通孔
封裝/外殼: 14-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 14-PDIP
包裝: 管件
1
FN3125.10
HI-303
Dual, SPDT CMOS Analog Switch
The HI-303 switch is a monolithic device fabricated using
CMOS technology and the Intersil dielectric isolation
process. This switch features break-before-make switching,
low and nearly constant ON resistance over the full analog
signal range, and low power dissipation.
The HI-303 is TTL compatible and has a logic “0” condition
with an input less than 0.8V and a logic “1” condition with an
input greater than 4V. (See pinouts for switch conditions with
a logic “1” input.)
Functional Diagram
Pinout Switch States Shown For A Logic “1” Input
HI-303 (PDIP, CERDIP, SOIC)
TOP VIEW
Features
Analog Signal Range (
±15V Supplies) . . . . . . . . . . ±15V
Low Leakage at 25oC . . . . . . . . . . . . . . . . . . . . . . . 40pA
Low Leakage at 125oC . . . . . . . . . . . . . . . . . . . . . . . 1nA
Low On Resistance at 25oC . . . . . . . . . . . . . . . . . . . 35
Break-Before-Make Delay . . . . . . . . . . . . . . . . . . . . 60ns
Charge Injection . . . . . . . . . . . . . . . . . . . . . . . . . . . 30pC
TTL, CMOS Compatible
Symmetrical Switch Elements
Low Operating Power (Typ) . . . . . . . . . . . . . . . . . . . . 1.0mW
Pb-Free Available (RoHS Compliant)
Applications
Sample and Hold (i.e., Low Leakage Switching)
Op Amp Gain Switching (i.e., Low On Resistance)
Portable, Battery Operated Circuits
Low Level Switching Circuits
Dual or Single Supply Systems
LOGIC
SW1, SW2
SW3, SW4
0OFF
ON
1ON
OFF
S
N
IN
P
D
1
2
3
4
5
6
7
14
13
12
11
10
9
8
NC
S3
D3
D1
S1
IN1
GND
V+
S4
D4
D2
S2
IN2
V-
Ordering Information
PART
NUMBER
TEMP.
RANGE (oC)
PACKAGE
PKG. DWG.
#
HI1-0303-2
-55 to 125
14 Ld CERDIP
F14.3
HI1-0303-5
0 to 75
14 Ld CERDIP
F14.3
HI3-0303-5
0 to 75
14 Ld PDIP
E14.3
HI3-0303-5Z
(See Note)
0 to 75
14 Ld PDIP
(Pb-free)
E14.3
HI9P0303-9
-40 to 85
14 Ld SOIC
M14.15
HI9P0303-9Z
(See Note)
-40 to 85
14 Ld SOIC
(Pb-free)
M14.15
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with
both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020C.
Data Sheet
November 17, 2004
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003, 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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