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參數(shù)資料
| 型號： | HI5628INZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 7/10頁 |
| 文件大小： | 0K |
| 描述： | IC DAC 8BIT 125MSPS DUAL 48-LQFP |
| 標準包裝： | 250 |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 330mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應商設備封裝： | 48-TQFP（7x7） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 4 電流，單極 |
| 采樣率（每秒）： | 125M |
6
Data Setup Time, tSU
See Figure 3 (Note 3)
3
-
ns
Data Hold Time, tHLD
See Figure 3 (Note 3)
3
-
ns
Propagation Delay Time, tPD
See Figure 3
-
1
-
ns
CLK Pulse Width, tPW1, tPW2
See Figure 3 (Note 3)
4
-
ns
POWER SUPPLY CHARACTERISTICS
AVDD Power Supply
(Note 8, 9)
2.7
5.0
5.5
V
DVDD Power Supply
(Note 8, 9)
2.7
5.0
5.5
V
Analog Supply Current (IAVDD)
5V or 3V, IOUTFS = 20mA
-
46
60
mA
5V or 3V, IOUTFS = 2mA
-
8
-
mA
Digital Supply Current (IDVDD)
5V, IOUTFS = Don’t Care (Note 5)
-
6
10
mA
3V, IOUTFS = Don’t Care (Note 5)
-
3
-
mA
Supply Current (IAVDD) Sleep Mode
5V or 3V, IOUTFS = Don’t Care)
-
3.2
6
mA
Power Dissipation (Both Channels)
5V, IOUTFS = 20mA (Note 6)
-
330
-
mW
5V, IOUTFS = 2mA (Notes 6)
-
140
-
mW
3V, IOUTFS = 20mA (Note 6)
-
170
-
mW
3V, IOUTFS = 2mA (Note 6)
-
54
-
mW
5V, IOUTFS = 20mA (Note 10)
-
300
-
mW
3.3V, IOUTFS = 20mA (Note 10)
-
150
-
mW
3V, IOUTFS = 20mA (Note 10)
-
135
-
mW
Power Supply Rejection
Single Supply (Note 7)
-0.2
-
+0.2
%
FSR/V
NOTES:
2. Gain Error measured as the error in the ratio between the full scale output current and the current through RSET (typically 625A). Ideally the
ratio should be 32.
3. Parameter guaranteed by design or characterization and not production tested.
4. Spectral measurements made with differential transformer coupled output and no filtering.
5. Measured with the clock at 50MSPS and the output frequency at 1MHz, both channels.
6. Measured with the clock at 100MSPS and the output frequency at 40MHz, both channels.
7. See ‘Definition of Specifications’.
8. For operation below 3V, it is recommended that the output current be reduced to 12mA or less to maintain optimum performance. DVDD and
AVDD do not have to be equal.
9. For operation above 125MHz, it is recommended that the power supply be 3.3V or greater. The part is functional with the clock above 125MSPS
and the power supply below 3.3V, but performance is degraded.
10. Measured with the clock at 60MSPS and the output frequency at 10MHz, both channels.
Electrical Specifications
AVDD = +5V, DVDD = +5V, VREF = Internal 1.2V, IOUTFS = 20mA, TA = 25oC for All Typical Values. Data given
is per channel except for ‘Power Supply Characteristics.’ (Continued)
PARAMETER
TEST CONDITIONS
HI5628IN
TA = -40oC TO 85oC
UNITS
MIN
TYP
MAX
HI5628
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HI5630 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple 8-Bit, 80MSPS A/D Converter with Internal Voltage Reference |
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| HI5630/8CN WAF | 制造商:Harris Corporation 功能描述: |
| HI5630_03 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple 8-Bit, 80MSPS A/D Converter with Internal Voltage Reference |
| HI5630CN | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple 8-Bit, 80MSPS A/D Converter with Internal Voltage Reference |
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