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參數(shù)資料
| 型號： | HI5640 |
| 英文描述： | 3.3V Dual 8-Bit， 40 MSPS A/D Converter with Internal Voltage Reference (3 pages) FN4657 |
| 中文描述： | 3.3V雙8位，40 MSPS的A / D轉(zhuǎn)換內(nèi)部電壓基準(zhǔn)（3頁）FN4657轉(zhuǎn)換器 |
| 文件頁數(shù)： | 6/10頁 |
| 文件大?。?/td> | 76K |
| 代理商： | HI5640 |
3-6
Analog Input Bias Current, I
B
A or I
B
B
V
INA
/V
INB
= ART/BRT, ARB/BRB, DC
(Notes 2, 3)
-
-
-
μ
A
Full Power Input Bandwidth, FPBW
f
S
= 40MHz, (Note 2)
-
250
-
MHz
REFERENCE VOLTAGE INPUT
Reference Voltage Input Range
-
-
-
V
Total Reference Resistance, R
RIN
-
300
-
Reference Current, I
RIN
-
-
-
mA
SAMPLING CLOCK INPUT
Input Logic High Voltage, V
IH
CLK
2.0
-
-
V
Input Logic Low Voltage, V
IL
CLK
-
-
0.8
V
Input Logic High Current, I
IH
CLK, V
IH
= 3.3V
-
-
-
μ
A
Input Logic Low Current, I
IL
CLK, V
IL
= 0V
-
-
-
μ
A
Input Capacitance, C
IN
CLK
-
-
-
pF
DIGITAL OUTPUTS
Output Logic High Voltage, V
OH
I
OH
= 100
μ
A; D
VDD
= 3.3V
-
-
-
V
Output Logic Low Voltage, V
OL
I
OL
= 1.5mA; D
VDD
= 3.3V
-
-
-
V
Output Logic High Voltage, V
OH
I
OH
= 100
μ
A; D
VDD
= 3.0V
-
-
-
V
Output Logic Low Voltage, V
OL
I
OL
= 100
μ
A; D
VDD
= 3.0V
-
-
-
V
Output Capacitance, C
OUT
-
-
-
pF
TIMING CHARACTERISTICS
Aperture Delay, t
AP
-
4
-
ns
Aperture Jitter, t
AJ
-
5
-
ps
RMS
Data Output Hold, t
H
-
10.7
-
ns
Data Output Delay, t
OD
-
11.7
-
ns
Data Latency, t
LAT
For a Valid Sample (Note 2)
-
5
-
Cycles
Power-Up Initialization
Data Invalid Time (Note 2)
-
-
-
Cycles
Sample Clock Pulse Width (Low)
(Note 2)
11.25
12.5
-
ns
Sample Clock Pulse Width (High)
(Note 2)
11.25
12.5
-
ns
Sample Clock Duty Cycle Variation
-
±
5
-
%
POWER SUPPLY CHARACTERISTICS
Analog Supply Voltage, A
VDD
(Note 2)
3.0
3.3
3.6
V
Digital Supply Voltage, D
VDD
(Note 2)
3.0
3.3
3.6
V
Supply Current, I
DD
f
S
= 40MSPS
-
30.3
-
mA
Power Dissipation
-
100
110
mW
Offset Error Sensitivity,
V
OS
A
VDD
or D
VDD
= 3.3V
±
5%
-
±
0.125
-
LSB
Gain Error Sensitivity,
FSE
A
VDD
or D
VDD
= 3.3V
±
5%
-
±
0.15
-
LSB
NOTES:
1. Parameter guaranteed by design or characterization and not production tested.
2. With the clock low and DC input.
Electrical Specifications
A
VDD
= D
VDD
= +3.3V; V
IN
= 1.50V; f
S
= 40MSPS at 50% Duty Cycle;
C
L
= 10pF; T
A
= 25
o
C; Unless Otherwise Specified
(Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ISL5640
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